Patents by Inventor Alejandro Gabriel Milesi

Alejandro Gabriel Milesi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230283250
    Abstract: Methods and apparatus for a signal isolator that mitigates the effects of CMTI strikes. In embodiments, a first die comprises a transmit module and the first die has a first voltage domain; and a second die comprises a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current. The second die may have a second voltage domain with the first and second die being separated by an isolation barrier. In embodiment, the receive amplifier includes a differential amplifier to receive the differential input signal from the transmit module; and a common mode module configured to sense the common mode current and sink or source the common mode current and minimize changes to an input impedance of the receive amplifier.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 7, 2023
    Applicant: Allegro MicroSystems, LLC
    Inventors: Bruno Luis Uberti, Juan Guido Salaya Velazquez, Alejandro Gabriel Milesi
  • Patent number: 11721648
    Abstract: Methods and apparatus for a signal isolator having reduced parasitics. An example embodiment, a signal isolator and include a first metal region electrically connected to a first die portion, a second die portion isolated from the first die portion, and a second metal region electrically connected to the second die portion. A third metal region can be electrically isolated from the first and second metal regions and a third die portion can be electrically isolated from the first, second and third metal regions. In embodiments, the first metal region, the second metal region, and the third metal region provide a first isolated signal path from the first die portion to the second die portion.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: August 8, 2023
    Assignee: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Alejandro Gabriel Milesi
  • Patent number: 11467928
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: October 11, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Publication number: 20220238461
    Abstract: Methods and apparatus for a signal isolator having reduced parasitics. An example embodiment, a signal isolator and include a first metal region electrically connected to a first die portion, a second die portion isolated from the first die portion, and a second metal region electrically connected to the second die portion. A third metal region can be electrically isolated from the first and second metal regions and a third die portion can be electrically isolated from the first, second and third metal regions. In embodiments, the first metal region, the second metal region, and the third metal region provide a first isolated signal path from the first die portion to the second die portion.
    Type: Application
    Filed: April 19, 2022
    Publication date: July 28, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Alejandro Gabriel Milesi
  • Patent number: 11342288
    Abstract: Methods and apparatus for a signal isolator having reduced parasitics. An example embodiment, a signal isolator and include a first metal region electrically connected to a first die portion, a second die portion isolated from the first die portion, and a second metal region electrically connected to the second die portion. A third metal region can be electrically isolated from the first and second metal regions and a third die portion can be electrically isolated from the first, second and third metal regions. In embodiments, the first metal region, the second metal region, and the third metal region provide a first isolated signal path from the first die portion to the second die portion.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 24, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Alejandro Gabriel Milesi
  • Patent number: 11320496
    Abstract: Apparatus includes a first portion of conductive material having varying response to a generated magnetic field along a length of the conductive material, wherein the first portion of conductive material produces a varying eddy current and a varying reflected magnetic field, in response to the generated magnetic field. The apparatus further includes one or more reference portions of conductive material having a relatively invariable response to the generated magnetic field, wherein the reference portion of conductive material produces a relatively invariable eddy current and a relatively invariable reflected magnetic field in response to the generated magnetic field.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: May 3, 2022
    Assignees: Allegro MicroSystems, LLC, COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Alexander Latham, Claude Fermon, Gerardo A. Monreal, Alejandro Gabriel Milesi
  • Patent number: 11218161
    Abstract: A tracking ADC with adaptive slew rate boosting can dynamically adjust one or more of its operational parameters in response to detecting a slew rate limit condition. In some embodiments, slew rate boosting can include increasing the value of a digital error signal in response to detection of a slew rate limit condition. In other embodiments, slew rate boosting can include increasing a clock frequency of the tracking ADC in response to detection of a slew rate limit condition.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: January 4, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Leandro Fuentes, Manuel Rivas, Patricio Hernan Perez Preiti, Bruno Luis Uberti, Alejandro Gabriel Milesi
  • Publication number: 20210133052
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Application
    Filed: January 15, 2021
    Publication date: May 6, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Publication number: 20210057330
    Abstract: Methods and apparatus for a signal isolator IC package including a die having a first die portion isolated from a second die portion. The first die portion is surrounded on six sides by first insulative material and the second die portion is surrounded on six sides by second insulative material. The first die portion provides a first voltage domain and the second die portion provides a second voltage domain. The signal isolator comprises a first signal path between the first die portion and the second die portion, wherein the first signal path is isolated with respect to the first and second die portions.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Bruno Luis Uberti, Alejandro Gabriel Milesi, Gerardo A. Monreal
  • Patent number: 10929252
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: February 23, 2021
    Assignee: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Publication number: 20200388581
    Abstract: Methods and apparatus for a signal isolator having reduced parasitics. An example embodiment, a signal isolator and include a first metal region electrically connected to a first die portion, a second die portion isolated from the first die portion, and a second metal region electrically connected to the second die portion. A third metal region can be electrically isolated from the first and second metal regions and a third die portion can be electrically isolated from the first, second and third metal regions. In embodiments, the first metal region, the second metal region, and the third metal region provide a first isolated signal path from the first die portion to the second die portion.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 10, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Alejandro Gabriel Milesi
  • Publication number: 20200225298
    Abstract: Apparatus includes a first portion of conductive material having varying response to a generated magnetic field along a length of the conductive material, wherein the first portion of conductive material produces a varying eddy current and a varying reflected magnetic field, in response to the generated magnetic field. The apparatus further includes one or more reference portions of conductive material having a relatively invariable response to the generated magnetic field, wherein the reference portion of conductive material produces a relatively invariable eddy current and a relatively invariable reflected magnetic field in response to the generated magnetic field.
    Type: Application
    Filed: March 24, 2020
    Publication date: July 16, 2020
    Applicants: Allegro MicroSystems, LLC, COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Alexander Latham, Claude Fermon, Gerardo A. Monreal, Alejandro Gabriel Milesi
  • Patent number: 10712403
    Abstract: Electronic circuits used in magnetic field sensors use transistors for passing a current through the transistors and also through a magnetoresistance element.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: July 14, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Mathew Drouin, Devon Fernandez, Jay M. Towne, Alejandro Gabriel Milesi
  • Patent number: 10641842
    Abstract: An apparatus comprises a conductive material having varying thickness along its length, the varying thickness providing varying response along a length of the conductive material to a magnetic field having a non-zero frequency; wherein the magnetic field produces an eddy current in the conductive material which generates a reflected magnetic field, wherein the varying response causes the reflected magnetic field to vary in strength along the length of the conductive material. The apparatus may include one or more reference portions of conductive material.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: May 5, 2020
    Assignees: Allegro MicroSystems, LLC, Commissariat à l'énergie atomique et aux énergies
    Inventors: Alexander Latham, Claude Fermon, Gerardo A. Monreal, Alejandro Gabriel Milesi
  • Patent number: 10520559
    Abstract: Hall effect elements are driven by current generators that use vertical epi resistors disposed away from an edge of a substrate upon which, within which, or over which, the Hall effect elements, the current generators, and the vertical epi resistors are disposed.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: December 31, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Andreas P. Friedrich, Gerardo A. Monreal, Alejandro Gabriel Milesi
  • Publication number: 20190370125
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Patent number: 10430296
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: October 1, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Publication number: 20190102261
    Abstract: A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Alejandro Gabriel Milesi
  • Publication number: 20190049529
    Abstract: Hall effect elements are driven by current generators that use vertical epi resistors disposed away from an edge of a substrate upon which, within which, or over which, the Hall effect elements, the current generators, and the vertical epi resistors are disposed.
    Type: Application
    Filed: August 14, 2017
    Publication date: February 14, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Andreas P. Friedrich, Gerardo A. Monreal, Alejandro Gabriel Milesi
  • Publication number: 20180340988
    Abstract: An apparatus comprises a conductive material having varying thickness along its length, the varying thickness providing varying response along a length of the conductive material to a magnetic field having a non-zero frequency; wherein the magnetic field produces an eddy current in the conductive material which generates a reflected magnetic field, wherein the varying response causes the reflected magnetic field to vary in strength along the length of the conductive material. The apparatus may include one or more reference portions of conductive material.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 29, 2018
    Applicants: Allegro MicroSystems, LLC, COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Alexander Latham, Claude Fermon, Gerardo A. Monreal, Alejandro Gabriel Milesi