Abstract: An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.

Abstract: A receiver (400) includes a tracking bandpass filter (420) and a signal processing circuit (430-480). The tracking bandpass filter (420) has a first input for receiving a radio frequency (RF) signal, and an output, and includes a first portion (731) on a semiconductor die (730), and at least one inductor (721). The at least one inductor (721) is operatively coupled to the first portion of the tracking bandpass filter (420). The signal processing circuit (430-480) has an input coupled to the output of the tracking bandpass filter (420), and an output for providing a processed signal. The semiconductor die (730) and the at least one inductor (721) are integrated into a single multi-chip module (MCM) (710).

Abstract: A receiver (400) includes a tracking bandpass filter (420), a tunable lowpass filter (434), a local oscillator (442), and a mixer (444). The tracking bandpass filter (420) has an input for receiving a radio frequency (RF) input signal, and an output. The tunable lowpass filter (434) has an input coupled to the output of the tracking bandpass filter (420), and an output. The local oscillator (422) has a first output for providing a local oscillator signal, which is characterized as being a square wave signal at the desired intermediate frequency (IF). The mixer (444) has a first input coupled to the output of the tunable lowpass filter (434), a second input coupled to the output of the local oscillator (442), and a first output for providing an IF signal at the desired IF. The tunable lowpass filter (434) is configured to substantially attenuate a third harmonic of the frequency of the local oscillator signal.

Abstract: In one embodiment, the present invention includes a method for digitizing a phase noise value indicative of a level of phase noise present in a LO signal and downconverting an RF signal to a second frequency signal using the LO signal. This downconversion can cause the phase noise to be transferred to the second frequency signal. The method may thus further include removing the phase noise from the second frequency signal using the digitized phase noise value.

Abstract: An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.

Abstract: In one embodiment, the present invention includes an accessory device for coupling to a portable system having an AM radio receiver. The accessory device includes a housing to house at least one accessory component and an AM antenna.

Abstract: A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.

Abstract: A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

Abstract: A radio frequency (RF) receiver with frequency planning includes an analog receiver, a digital processor, and a clock synthesizer. The analog receiver has an input for receiving an RF input signal, and an output for providing a digital intermediate frequency (IF) signal. The digital processor has a first input for receiving the digital IF signal, a second input for receiving a clock signal, a signal output for providing an IF output signal, and a control output for providing a clock control signal. The clock synthesizer has an input for receiving the clock control signal, and an output for providing the clock signal, and is controllable to adjust a frequency of the clock signal to a selected one of a predetermined number of frequencies within a predetermined frequency range in response to the clock control signal.

Abstract: An analog to digital converter includes a delta sigma modulator with a modified distributed feed-forward (DFF) topology. The modulator includes low pass filter circuitry that provides a first path to a first integrator and a second, feed-forward path to a second integrator that significantly reduce the out of band signal transfer function (STF) peaking of the modulator.

Abstract: An analog to digital converter includes a delta sigma modulator with a modified distributed feed-forward (DFF) topology. The modulator includes low pass filter circuitry that provides a first path to a first integrator and a second, feed-forward path to a second integrator that significantly reduce the out of band signal transfer function (STF) peaking of the modulator.

Abstract: A shielded differential inductor forms a high quality factor (high-Q) inductor that is configured to attenuate frequency spurs and/or noise from magnetic coupling generated by electrical structures on or off of a substrate as well as interference received by other components from magnetic coupling generated by the inductor. The shielded differential inductor includes a differential inductor and a shield that substantially isolates the electrical field between the inductor and the substrate to reduce substrate current loss. The shield includes sets of finger structures that extend beyond the width of the inductor and a hub and spoke configuration of ground conductors that connect the sets of finger structures to ground.

Abstract: A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.

Abstract: In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.

Abstract: In one embodiment, a set of tracking filters to be coupled between an amplifier and a mixer is provided. The tracking filters may be differently configured depending on band of operation. For example, a first set of the filters can be configured to maintain a substantially constant Q value across their operating bandwidth while a second set of the filters can be configured to maintain a substantially constant bandwidth across their operating bandwidth.

Abstract: In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

Abstract: In one embodiment, an apparatus includes mixer stages each coupled to receive a radio frequency (RF) signal from a corresponding tracking filter each configured for a band of frequencies. Each mixer stage is controllable to mix the RF signal with a divided master clock signal to obtain N multi-phase intermediate frequency (IF) signals, where N is programmable based upon a desired channel frequency. A load network having individual loads to be shared by the mixers can be coupled to the mixer stages, and a shared IF combiner may be coupled to the load network to weight and combine outputs of the load network to obtain a quadrature IF signal. The load network can include multiple loads each to be individually controlled to receive one of the multi-phase IF signals.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.