Patents by Inventor Alexander Martin Böhm

Alexander Martin Böhm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cache partitioning to accelerate concurrent workloads
    Patent number: 10891234
    Abstract: Disclosed herein are system, method, and computer program product embodiments for cache partitioning to accelerate concurrent workload performance of in-memory databases. An embodiment operates by storing a first bitmask, associating the first bitmask with a first processor core, setting a subset of the bits of the first bitmask, wherein the subset of the bits of the first bitmask represents a first portion of shared last-level cache, and wherein any part of the first bitmask excluding the subset of the bits of the first bitmask represents a second portion of the lowest-level cache, and disallowing eviction of any cache line in the second portion of the lowest-level cache by the first processor core.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: January 12, 2021
    Assignee: SAP SE
    Inventors: Stefan Noll, Norman May, Alexander Martin Böhm, Jens Thilo Teubner
  • Cache Partitioning to Accelerate Concurrent Workloads
    Publication number: 20190310943
    Abstract: Disclosed herein are system, method, and computer program product embodiments for cache partitioning to accelerate concurrent workload performance of in-memory databases. An embodiment operates by storing a first bitmask, associating the first bitmask with a first processor core, setting a subset of the bits of the first bitmask, wherein the subset of the bits of the first bitmask represents a first portion of shared last-level cache, and wherein any part of the first bitmask excluding the subset of the bits of the first bitmask represents a second portion of the lowest-level cache, and disallowing eviction of any cache line in the second portion of the lowest-level cache by the first processor core.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventors: Stefan Noll, Norman May, Alexander Martin Böhm, Jens Thilo Teubner