Patents by Inventor Alfred Haimerl

Alfred Haimerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080303172
    Abstract: Apparatus for packaging two chips includes, in some embodiments, a first chip having at least one elevation and at least one cutout on a bottom thereof. It also includes a second chip having at least one elevation and at least one cutout on a top thereof. In some embodiments disclosed, the elevations and cutouts of the first chip and the second chip are configured to allow the elevations to be intermeshed with the cutouts when the chips are stacked with the bottom of the first chip engaging the top of the second chip.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler
  • Patent number: 7462940
    Abstract: A semiconductor component includes flip-chip contacts arranged on a wiring structure of a semiconductor chip. The wiring structure includes at least one metallization layer and at least one dielectric insulation layer made of a low-k material with a relative permittivity ?r lower than the relative permittivity of a silicon dioxide. The flip-chip contacts are arranged on contact areas of an upper metallization layer and have a polymer core surrounded by a lead-free solder sheath.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: December 9, 2008
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Patent number: 7443019
    Abstract: The invention relates to a semiconductor device with conductor tracks between a semiconductor chip and a circuit carrier, and to a method for producing the same. The conductor tracks extend from contact areas on the top side of the semiconductor chip to contact pads on the circuit carrier. The conductor tracks include an electrically conductive polymer in the semiconductor device.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: October 28, 2008
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Publication number: 20080224301
    Abstract: A lead structure for a semiconductor component includes: external leads for external connections outside a plastic housing composition, internal leads for electrical connections within the plastic housing composition, and a chip mounting island composed of the lead material. While leaving free contact pads of the internal leads, the top sides of the chip mounting island and the internal leads are equipped with nanotubes as an anchoring layer. The plastic housing composition is arranged in the interspaces between the nanotubes arranged on the internal leads, while an adhesive composition for the semiconductor chip is arranged in the interspaces between the nanotubes arranged on the chip mounting island. The adhesive composition and the plastic housing composition fill the interspaces in a manner free of voids.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 18, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Angela Kessler, Wolfgang Schober, Alfred Haimerl, Joachim Mahler
  • Publication number: 20080173097
    Abstract: A semiconductor sensor component including a housing with a cavity and a sensor chip and a method for producing the same are described herein. The housing includes an opening to the surroundings of the housing and the sensor chip includes a sensor region which faces the opening. The sensor chip is embedded in the cavity of the housing into a rubber-elastic layer with its rear side and its edge sides, where the rubber-elastic layer includes cleavable included organometallic or inorganic metallic complexes. The metals of the complexes lie in a freely accessible manner on the top side of the rubber-elastic layer and form metallic nuclei for wiring lines which electrically connect the sensor region of the sensor chip to contact pads in the cavity of the cavity housing.
    Type: Application
    Filed: October 4, 2007
    Publication date: July 24, 2008
    Applicant: Infineon Technologies AG
    Inventors: Michael Bauer, Angela Kessler, Wolfgang Schober, Alfred Haimerl, Joachim Mahler
  • Publication number: 20080173998
    Abstract: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region.
    Type: Application
    Filed: February 16, 2007
    Publication date: July 24, 2008
    Applicant: Infineon Technologies AG
    Inventors: Joachim Mahler, Alfred Haimerl, Michael Bauer
  • Publication number: 20080122075
    Abstract: A semiconductor module includes a module package including a first substrate having a first semiconductor device and a second substrate having a second semiconductor device. A first outer conductor extends from the module package and is connected to the first substrate and a second outer conductor extends from the module package and is connected to the second substrate. A method for producing the semiconductor module includes attaching first outer conductors of a leadframe to a first substrate, where the first substrate includes a first semiconductor device that is attached to the first substrate either before or after attaching the first outer conductors, A second substrate is provided including a signal processing circuit and the second substrate is fastening to second outer conductors of the leadframe.
    Type: Application
    Filed: December 19, 2006
    Publication date: May 29, 2008
    Applicant: Infineon Technologies AG
    Inventors: Michael Bauer, Angela Kessler, Wolfgang Schober, Alfred Haimerl, Joachim Mahler
  • Publication number: 20080111216
    Abstract: A component arrangement comprising a carrier, a component in a housing with electrical contacts and a moulding compound that encloses the carrier, the semiconductor component in the housing and the electrical contacts, wherein the component is applied on the carrier, and wherein the carrier is provided with holes, and a method for producing a component arrangement, wherein the carrier is provided with holes, the component is positioned on the carrier, the component is connected to the carrier, the component with the carrier is positioned in the leadframe, and this arrangement is enclosed by a moulding compound.
    Type: Application
    Filed: September 25, 2007
    Publication date: May 15, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael BAUER, Alfred HAIMERL, Angela KESSLER, Joachim MAHLER, Wolfgang SCHOBER
  • Patent number: 7312533
    Abstract: An electronic component has an electronic circuit and a rubber-elastic elevation. The rubber-elastic elevation is formed of an insulating rubber-elastic material disposed on a surface of the electronic component and has a conductive land on its crest. The rubber-elastic elevation also has on its sloping side or in its volume a conduction path between the land and the electronic circuit.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: December 25, 2007
    Assignee: Infineon Technologies AG
    Inventors: Alfred Haimerl, Harry Hedler, Jens Pohl
  • Publication number: 20070278637
    Abstract: A circuit arrangement includes a component or an integrated circuit firmly attached on a wiring carrier via an adhesive layer. Furthermore, a pyrolytically deposited adhesion promoter layer with high surface energy and/or high porosity in the nanometer range is selectively provided on a metallic adherend location of the wiring carrier.
    Type: Application
    Filed: June 4, 2007
    Publication date: December 6, 2007
    Applicant: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler
  • Publication number: 20070268674
    Abstract: An electronic module includes a component housing and at least one semiconductor chip. The semiconductor chip is arranged on a circuit carrier in the component housing. The semiconductor chip is connected to an upper face of the circuit carrier via connection elements. In this case, the semiconductor chip, the connection elements and, partially, the circuit carrier are embedded in a plastic housing compound. A metal plate which is structured into lead interconnects and contact connecting pads is provided on the upper face of the component housing.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 22, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Publication number: 20070235865
    Abstract: The invention relates to a semiconductor module comprising stacked discrete components and a method for producing the same. In one embodiment, the semiconductor module has a semiconductor chip arranged on a wiring substrate. The discrete components are arranged and wired on an intermediate carrier, which is electrically connected to the wiring substrate and/or the semiconductor chip. The wiring substrate carries the semiconductor chip, the semiconductor chip carries the intermediate carrier and the intermediate carrier carries the discrete components.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 11, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler
  • Publication number: 20070228567
    Abstract: A semiconductor chip (1) has a metal coating structure (2) which has on an active upper side (3) of the semiconductor chip (1) at least one lower metal layer (8) with copper or copper alloy, on which a central metal layer (9) with nickel is arranged. The metal coating structure (2) is terminated by an upper metal layer (10) of palladium and/or a precious metal. The central metal layer (9) with nickel and/or nickel phosphide has a rough interface (11) with respect to the plastic package molding compound surrounding the metal coating structure (2).
    Type: Application
    Filed: March 28, 2007
    Publication date: October 4, 2007
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Publication number: 20070210883
    Abstract: A substrate including strip conductors with a wiring pattern that connects contact areas to one another. The strip conductors have a small strip conductor width. The contact areas and/or the strip conductors form a narrow connection pitch and include electrically conductive carbon nanotubes.
    Type: Application
    Filed: January 22, 2007
    Publication date: September 13, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Gottfried Beer, Jochen Dangelmaier, Alfred Haimerl, Manfred Mengel, Klaus Mueller, Klaus Pressel
  • Patent number: 7268423
    Abstract: The present invention describes a rewiring plate for components with connection grids of between approx. 100 nm and 10 ?m, which rewiring plate includes a base body and passages with carbon nanotubes, the lower end of the passages opening out into contact connection surfaces, and the carbon nanotubes forming an electrically conductive connection from the contact connection surfaces to the front surface of the base body.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: September 11, 2007
    Assignee: Infineon Technologies AG
    Inventors: Gottfried Beer, Jochen Dangelmaier, Alfred Haimerl, Manfred Mengel, Klaus Mueller, Klaus Pressel
  • Publication number: 20070205518
    Abstract: A layer improves adhesion between interfaces of different components in semiconductor devices. The interface of a first component includes surfaces of a circuit carrier and the interface of a second component includes contact surfaces of a plastic package molding compound. The adhesion-improving layer includes a mixture of polymeric chain molecules and carbon nanotubes.
    Type: Application
    Filed: March 28, 2007
    Publication date: September 6, 2007
    Applicant: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Khalil Hosseini, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Publication number: 20070182021
    Abstract: A semiconductor component includes flip-chip contacts arranged on a wiring structure of a semiconductor chip. The wiring structure includes at least one metallization layer and at least one dielectric insulation layer made of a low-k material with a relative permittivity ?r lower than the relative permittivity of a silicon dioxide. The flip-chip contacts are arranged on contact areas of an upper metallization layer and have a polymer core surrounded by a lead-free solder sheath.
    Type: Application
    Filed: January 8, 2007
    Publication date: August 9, 2007
    Applicant: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Publication number: 20070145552
    Abstract: A semiconductor component includes at least one semiconductor chip arranged on a mounting substrate and connected thereto via bonding wires. For effective dissipation of heat, a solderable interlayer is arranged on the active upper side of the semiconductor chip and a heat sink is soldered onto the solderable interlayer. A method is also described for producing a semiconductor component with a solderable interlayer disposed on an active upper side of a semiconductor chip and with a heat sink soldered to the solderable interlayer.
    Type: Application
    Filed: November 13, 2006
    Publication date: June 28, 2007
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
  • Patent number: 7230309
    Abstract: The invention relates to a semiconductor component and a sensor component with data transmission devices, for wireless transmission the semiconductor component having a main coupling element and the sensor component having a sensor coupling element. The invention affords the possibility of multiple sensor applications without direct electrical contact between sensor component and semiconductor component, which may have a logic chip.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: June 12, 2007
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Thomas Engling, Alfred Haimerl, Joachim Mahler, Wolfgang Schober
  • Publication number: 20070085201
    Abstract: One aspect of the invention relates to a power semiconductor device in lead frame technology and a method for producing the same. The power semiconductor device has a vertical current path through a power semiconductor chip. The power semiconductor chip has at least one large-area electrode on its top side and a large-area electrode on its rear side. The rear side electrode is surface-mounted on a lead frame chip island of a lead frame and the top side electrode is electrically connected to an internal lead of the lead frame via a connecting element. The connecting element has an electrically conductive film on a surface facing the top side electrode, the electrically conductive film extending from the top side electrode to the internal lead.
    Type: Application
    Filed: October 16, 2006
    Publication date: April 19, 2007
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober