Abstract: In one aspect, a method for placing carbon nanotubes on a dielectric includes: using DSA of a block copolymer to create a pattern in the placement guide layer on the dielectric which includes multiple trenches in the placement guide layer, wherein there is a first charge on sidewall and top surfaces of the trenches and a second charge on bottom surfaces of the trenches, and wherein the first charge is different from the second charge; and depositing a carbon nanotube solution onto the dielectric, wherein self-assembly of the deposited carbon nanotubes within the trenches occurs based on i) attractive forces between the first charge on the surfaces of the carbon nanotubes and the second charge on the bottom surfaces of the trenches and ii) repulsive forces between the first charge on the surfaces of the carbon nanotubes and the first charge on sidewall and top surfaces of the trenches.

Abstract: A method of fabricating a carbon nanotube based device, including forming a trench having a bottom surface and sidewalls on a substrate, selectively depositing a bi-functional compound having two reactive moieties in the trench, wherein a first of the two reactive moieties selectively binds to the bottom surface, converting a second of the two reactive moieties to a diazonium salt; and reacting the diazonium salt with a dispersion of carbon nanotubes to form a carbon nanotube layer bound to the bottom surface of the trench.

Abstract: Embodiments of the invention are directed to a solid-state zinc sensor. A non-limiting example of the sensor includes a semiconductor substrate. The sensor can also include an assembly surface on the semiconductor substrate. The sensor can also include a zinc detection monolayer chemically bound to the assembly surface. The sensor can also include a power supply electrically connected to the semiconductor substrate.

Abstract: A chemical sensor, methods of forming the same, and methods of performing chemical detection include a carbon nanotube test surface. A detector is configured to receive a signal from the carbon nanotube test surface responsive to illumination on the nanotube test surface. A matching module is configured to determine whether a chemical is present at the carbon nanotube test surface based on a comparison between the signal and a spectral profile of the chemical.

Abstract: Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots. The device architectures are usable as three terminal or two terminal devices.

Abstract: Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

Abstract: A method for making a hydrophobic biosensing device includes forming alternating layers over a top and sides of a fin on a dielectric layer to form a stack of layers. The stack of layers are planarized to expose the top of the fin. The fin and every other layer are removed to form a cathode group of fins and an anode group of fins. A hydrophobic surface on the two groups of fins.

Abstract: Embodiments of the invention are directed to a solid-state zinc sensor. A non-limiting example of the sensor includes a semiconductor substrate. The sensor can also include an assembly surface on the semiconductor substrate. The sensor can also include a zinc detection monolayer chemically bound to the assembly surface. The sensor can also include a power supply electrically connected to the semiconductor substrate.

Abstract: Embodiments of the invention are directed to a solid-state zinc sensor. A non-limiting example of the sensor includes a semiconductor substrate. The sensor can also include an assembly surface on the semiconductor substrate. The sensor can also include a zinc detection monolayer chemically bound to the assembly surface. The sensor can also include a power supply electrically connected to the semiconductor substrate.

Abstract: A method for inorganic surface passivation in a photovoltaic device includes etching a native oxide over an inorganic substrate, the inorganic substrate having a surface; and forming an organic monolayer on the surface of the inorganic substrate to form a heterojunction, the organic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond.

Abstract: A method for inorganic surface passivation in a photovoltaic device includes etching a native oxide over an inorganic substrate, the inorganic substrate having a surface; and forming an organic monolayer on the surface of the inorganic substrate to form a heterojunction, the organic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond.

Abstract: Junction field-effect transistors including inorganic channels and organic gate junctions are used in some applications for forming high resolution active matrix displays. Arrays of such junction field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes.

Abstract: Techniques for selective placement of carbon nanotubes using bifunctional acid monolayers are provided. In one aspect, a method for selective placement of carbon nanotubes on a metal oxide surface includes the steps of: dispersing poly-fluorene polymer-wrapped carbon nanotubes in an organic solvent; creating a patterned monolayer of a bifunctional acid on the metal oxide surface, wherein the bifunctional acid comprises a first acid functional group for binding to the metal oxide surface, and a second acid functional group for binding to the poly-fluorene polymer-wrapped carbon nanotubes; and contacting the poly-fluorene polymer-wrapped carbon nanotubes dispersed in the organic solvent with the patterned monolayer of the bifunctional acid on the metal oxide surface to selectively place the carbon nanotubes on the metal oxide surface via the patterned monolayer of the bifunctional acid. A carbon nanotube-based device and method of formation thereof are also provided.

Abstract: Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots. The device architectures are usable as three terminal or two terminal devices.

Abstract: Hybrid high electron mobility field-effect transistors including inorganic channels and organic gate barrier layers are used in some applications for forming high resolution active matrix displays. Arrays of such high electron mobility field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes. The organic gate barrier layers are operative to suppress both electron and hole transport between the inorganic channel layer and the gate electrodes of the high electron mobility field-effect transistors.

Abstract: Systems, methods, and electronic circuits facilitating embedded sensor chips in polymer-based coatings are provided. In one example, a method comprises fabricating an electronic circuit, the electronic circuit comprising one or more semiconductor devices, one or more sensors, and a communication element; encapsulating the electronic circuit within an insulator, resulting in an encapsulated circuit; and dispersing the encapsulated circuit into a lacquer solution comprising a polymer carrier and a solvent.

Abstract: Systems, methods, and electronic circuits facilitating embedded sensor chips in polymer-based coatings are provided. In one example, a method comprises fabricating an electronic circuit, the electronic circuit comprising one or more semiconductor devices, one or more sensors, and a communication element; encapsulating the electronic circuit within an insulator, resulting in an encapsulated circuit; and dispersing the encapsulated circuit into a lacquer solution comprising a polymer carrier and a solvent.

Abstract: Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

Abstract: A method of forming semiconductor elements in an artificial neural network, the method including forming a substrate including an oxide layer, forming a Silicon layer on the oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.