Abstract: Both homojunction and heterojunction bipolar transistor structures are fabricated in unique trenched configurations so as to better utilize their surface areas by employing both the vertical and horizontal portions of their base regions with equal effectiveness. An important advantage of the unique trenched configurations is that the base region of each trenched structure is of precisely the same thickness throughout--both vertical and horizontal portions. Consequently, the transit time for charge carriers to diffuse across the base region and the base transport factor are uniform because of the uniform base thickness. Moreover, the parasitic capacitance region of each trenched structure beneath base metallization contacts is only a small portion of the entire base-collector junction region.

Abstract: The present invention is a complementary-symmetry COMFET pair consisting of an N-channel lateral COMFET and a P-channel lateral COMFET interconnected in parallel on the same chip. The device is formed in a layer of single-crystalline silicon of one conductivity type with one of the pair of COMFETs being formed directly in this layer. A well of opposite conductivity type is disposed in the layer and the other of the pair of COMFETs is disposed in the well. The two COMFETs are isolated from each other by a highly doped region which extends from the surface of the layer to the substrate and is of the same conductivity type as that of the substrate.

Abstract: A vertical MOSFET device includes a semiconductor wafer having source, body and drain regions of alternate conductivity type disposed therein. The source and drain regions are located so as to define the length and width of a channel region in the body region at a surface of the wafer. The body region further includes a similar conductivity type supplementary region having a relatively high areal dopant concentration. The supplementary region, which can be fabricated by ion implantation, extends laterally beneath a portion of the channel region. A source electrode is disposed on one wafer surface and a drain electrode is disposed on an opposing wafer surface.

Abstract: A semiconductor device having a layer of semiconductor material disposed on an insulating substrate is disclosed. A means is provided within the insulating substrate for minimizing the collection of radiation-induced charge carriers at the interface between the layer of semiconductor material and the insulating substrate. This means significantly reduces the accumulation of positive charges in the insulating substrate which would otherwise cause back-channel leakage when the device is operated after being irradiated. Also, the means minimizes the collection of charge carriers injected from the insulating substrate into the semiconductor device disposed on the insulating substrate. A method of fabricating this semiconductor device is also disclosed.

Abstract: A method for decreasing the turnoff time in a crystalline semiconductor region within a semiconductor device comprises initially providing a semiconductor region having a predetermined density of pinning centers. The semiconductor region is then irradiated so as to yield crystal damage that is equivalent to or greater than that which would be produced by irradiating with 1 MeV neutrons at a fluence greater than approximately 10.sup.13 cm.sup.-2. The region is then annealed at a temperature of approximately 350.degree. to 450.degree. C. for approximately 15 minutes to one hour so as to yield a density of stable recombination centers correlating with the pinning centers that provides a stable minority carrier lifetime within the semiconductor region.

Abstract: A method for revealing the presence of heavy metal impurities that may have been introduced during the formation of a layer, such as the deposition of an epitaxial layer on a semiconductor substrate, uses the constant-magnitude steady-state surface photovoltage (SPV) method for determining the minority-carrier diffusion length by essentially two determination steps. A large ratio of the respective diffusion lengths determined before (actually measured or based on a priori knowledge of similar material) and after the epitaxial deposition step is indicative of the presence of a heavy metal impurity in the epitaxial layer. The method is based on the fact that the contaminating metal distributes itself substantially uniformly not only through the epitaxial layer but also throughout the substrate.

Abstract: A vertical MOSFET device includes a semiconductor wafer having source, body and drain regions of alternate conductivity type disposed therein. The source and drain regions are located so as to define the length and width of a channel region in the body region at a surface of the wafer. The body region further includes a similar conductivity type supplementary region having a relatively high areal dopant concentration. The supplementary region, which can be fabricated by ion implantation, extends laterally beneath a portion of the channel region. A source electrode is disposed on one wafer surface and a drain electrode is disposed on an opposing wafer surface.

Abstract: The presence of crystallographic damage in a semiconductor surface region is determined by surface photovoltage (SPV) measurements. Deviations from the idealized straight line SPV plot of photon flux (I.sub.o) versus reciprocal absorption coefficient (.alpha..sup.-1) in upward-facing concave form are used as a criterion of surface quality. This criterion is used to determine the minimum etching required to remove the damaged surface.

Abstract: A four layer insulated gate controlled semiconductor device has a range of anode-cathode currents over which gate control potentials will extinguish such anode-cathode current. Coupling circuitry for limiting the rate of change of turn-off gate control potential to the gate of the device enhances the range of anode-cathode current over which control is maintained.

Abstract: A method of treating the surface of a sample of n-type silicon material in preparation for measurements for determining the minority carrier diffusion length of the material by the surface photovoltage method comprises applying a strong oxidizing agent to an appropriately prepared surface of a semiconductor material such as silicon. The oxidizing agent is taken from the group consisting of potassium permanganate [KMnO.sub.4 ], potassium dichromate [K.sub.2 Cr.sub.2 O.sub.7 ], and ammonium dichromate [(NH.sub.4).sub.2 Cr.sub.2 O.sub.7 ]. The surface preparation assures a consistently large surface photovoltage that is stable during the surface photovoltage measurement for minority carrier diffusion length.

Abstract: A plurality of wafers is serially disposed between a reactant gas inlet portion and an exhaust gas outlet portion of a deposition chamber. The reactant gas comprises a predetermined mixture of N.sub.2 O and SiH.sub.4, and a positive, monotonically decreasing temperature gradient is provided between the wafer closest to the inlet portion to the wafer closest to the outlet portion, such that the thickness and resistivity of the deposited SIPOS (semi-insulating polycrystalline silicon) are substantially similar on each wafer.

Abstract: A vertical MOSFET includes source and gate electrodes on a major semiconductor surface, and a drain electrode on an opposing semiconductor surface. A shield electrode is disposed in proximity to the gate electrode so as to minimize feedback capacitance between the gate electrode and drain region. Additionally, the shield electrode increases the level of space charge limited current that can be supported in the drain region, and minimizes current crowding in the device.

Abstract: An improved self-aligned conductive gate member formed by suppressing or decreasing the size of the as-deposited grains of polysilicon and by suppressing further grain growth which may occur during a subsequent annealing or processing step. By maintaining the as-deposited grains as small as possible, the initiation of intergranular voids is minimized. This is accomplished by forming a low resistivity oxygen doped polycrystalline silicon layer in place of the conventional polysilicon.

Abstract: The preferred embodiment of the invention disclosed herein provides a CCD imager with reduced striation contrast in its displayed image. The wafer on which the imager is to be formed is lightly doped with atoms of one conductivity type. Before forming the various regions of the imager in the wafer, a layer is first doped with atoms of the same conductivity type so as to have a substantially uniform lateral concentration. This is preferably accomplished by ion implantation and diffusion techniques. Thereafter, an imager is formed in this layer in accordance with any desired technique.

Abstract: An improved self-aligned conductive gate member formed by suppressing or decreasing the size of the as-deposited grains of polysilicon and by suppressing further grain growth which may occur during a subsequent annealing or processing step. By maintaining the as-deposited grains as small as possible, the initiation of intergranular voids is minimized.

Abstract: There is disclosed a method of forming a multi-layer passivant system including a layer of oxygen doped polycrystalline silicon over the semiconductor substrate. A layer of silicon dioxide is thermally grown over the oxygen doped polycrystalline silicon layer. If desired, layers of glass and an additional oxide layer can be formed over the thermally grown oxide.

Abstract: Method and apparatus are provided for determining the diffusion length of minority carriers in semiconductors using the constant-magnitude surface-photovoltage (SPV) method. A servo system maintains a constant predetermined value of the SPV. A novel capacitance-pickup electrode couples the SPV to a preamplifier in the measurement system and functions to reduce SPV drift. A keyboard or computer is used to select both the operating optical wavelength of an adjustable monochromator and a network to compensate for the wavelength dependent sensitivity of a photodetector used to measure the illumination intensity (photon flux) on the semiconductor. Measurements of the relative photon flux for a plurality of wavelengths are plotted against the reciprocal of the optical absorption coefficient of the material. A linear plot of the data points is extrapolated to zero intensity.

Abstract: A silicon-on-sapphire structure and method for forming the same is described wherein the leakage current attributable to "back channel" leakage is minimized by forming the channel region in such a manner as to have provided therein at least two levels of dopant concentration. The heavier level of dopant concentration is positioned adjacent the silicon/sapphire interface while the lighter level of dopant concentration occupies the remainder of the channel region and is shallower than the heavier level. The classic inversion process takes place in the lightly doped section at the shallow level.

Abstract: A readout device is disclosed which comprises a substrate of semiconductive material having a source and drain region formed therein. These regions of the device are placed adjacent to the surface of a dielectric storage medium, selective portions of which, i.e. selective storage locations, are electrostatically charged. The dielectric storage medium has a layer of conductive material formed thereon to which a signal is applied in order to determine whether the storage location being accessed is charged, and, in one embodiment, to determine what the magnitude of that charge might be.