Patents by Inventor Amaresh Vysyaraju

Amaresh Vysyaraju has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DISTRIBUTED HANDLING OF FORWARD ERROR CORRECTION IN HARDWARE ASSISTED VERIFICATION PLATFORMS
    Publication number: 20240297746
    Abstract: This application discloses distributed forward error correction in hardware assisted verification platforms (300) including a hardware-assisted verification system (320) to emulate an electronic system (322) described by a circuit design (301). The hardware-assisted verification system (320) can implement forward error correction circuitry (324) to analyse a data packet (311) for use by the emulated electronic system (322) during functional verification operations of the circuit design (301), which can identify that the data packet includes one or more corrupted bits (321). The forward error correction circuitry (324) can transmit the corrupted data packet (321) to a computing system (330) implementing an error correction algorithm configured to perform error correction operations (332) on the corrupted data packet (321).
    Type: Application
    Filed: August 31, 2021
    Publication date: September 5, 2024
    Applicant: Siemens Industry Software Inc.
    Inventors: Amaresh Vysyaraju, Amit Kumar Gupta, Saurabh Khaitan, Sudhanshu Jayaswal