Abstract: A method for tracking physical assets can include: receiving a digital asset; determining an asset identifier for the digital asset; generating an asset barcode; optionally facilitating printing and sending of the asset to an asset recipient; determining an asset event for the asset; and notifying a sender of an asset event.

Abstract: Implementations of the present application provide a semiconductor device, a fabrication method and a memory system. The semiconductor device includes a plurality of semiconductor pillars arranged in an array and a word line structure. The plurality of semiconductor pillars extend along a first direction and include at least one side face, wherein the plurality of semiconductor pillars are arranged in rows along a second direction perpendicular to the first direction. The word line structure is located between a first row and a second row of semiconductor pillars that are adjacent, and includes a first word line structure and a second word line structure spaced apart from the first word line structure, wherein the first word line structure is connected with a side face of the first row of semiconductor pillars, and the second word line structure is connected with a side face of the second row of semiconductor pillars.

Abstract: Methods of using a pharmaceutical composition comprising ebastine and alprazolam for treating patients suffering from one or more psychiatric disorders, such as major depressive disorder, generalized anxiety disorder, mild chronic depression, premenstrual dysphoric disorder are disclosed.

Abstract: A first image and a second image are accessed. The second image is generated by applying an augmented reality (AR) effect to the first image. The first image, the second image, and a prompt are provided to a visual-semantic machine learning model to obtain output describing at least one feature of the AR effect. A description of the AR effect is generated based on the output of the visual-semantic machine learning model. The description of the AR effect is stored in association with an identifier of the AR effect.

Abstract: A heat dissipation device and a computer device are disclosed. The heat dissipation device includes a case and a fan module. The case includes a first wall, a second wall and an accommodation cavity. The accommodation cavity is located between the first wall and the second wall in a first direction. The first wall includes a first through hole. The second wall includes a second through hole. The first through hole is connected to the accommodation cavity, the second through hole is connected to the accommodation cavity. The fan module is mounted in the accommodation cavity. The fan module includes a bracket assembly and a plurality of fans. The bracket assembly is detachably connected to the plurality of fans and the case.

Abstract: A positioning reference signal (PRS) measurement method, a terminal, and a network side device are provided. The positioning reference signal (PRS) measurement method includes: The terminal performs PRS measurement on at least one of a plurality of carriers to obtain a positioning measurement result when the terminal is configured to simultaneously perform PRS measurement on the plurality of carriers, where the positioning measurement result is used for positioning the terminal.

Abstract: Disclosed are integrated systems and methods that utilize a network of DFOS sensors installed on power lines, communication networks, and transportation systems, which continuously monitor infrastructures and provide real-time data. This data is collected, processed, and analyzed, and used to identify any affected areas of infrastructure and assess severity of any damage. Prioritization and resource allocation is performed and uses this analysis to prioritize restoration efforts and allocate resources such as repair crews, equipment, and materials to areas with a highest priority.

Abstract: A terminal includes circuitry and a transmitter. The circuitry, in operation, determines a first transmission power for a first uplink signal and a second transmission power for a second uplink signal by prioritizing allocation of a transmission power to the second transmission power for the second uplink signal, responsive to, in a first transmission time interval (TTI) where the first uplink signal is transmitted, the second uplink signal being transmitted in a second TTI that is shorter than the first TTI. The transmitter, in operation, transmits the first uplink signal with the determined first transmission power and transmits the second uplink signal with the determined second transmission power.

Abstract: A cell assembly includes a silicon substrate; a first doped region and a second doped region, having opposite polarities. The first doped region is an N-type doped region; the first doped region includes a first doped layer, a passivation layer, and a second doped layer; the passivation layer of the first doped region is provided on the first doped layer of the first doped region; and a conductive channel is formed in the passivation layer of the first doped region.

Abstract: This application provides a pixel unit, a manufacturing method therefor, a microdisplay, and a discrete device. The pixel unit includes a backplane, a display unit, a cathode electrical connection structure, and at least one anode electrical connection structure. The display unit includes at least one device layer, the at least one device layer is vertically stacked in sequence, each of the at least one device layer includes a P-type contact layer, a pixel layer, and an N-type contact layer stacked in sequence, and the P-type contact layer is located on a side of the device layer facing the backplane; and each of the at least one anode electrical connection structure is electrically connected to the P-type contact layer of the corresponding device layer, and the cathode electrical connection structure is electrically connected to the N-type contact layer of each of the at least one device layer respectively.

Abstract: A friction stir tool cooling method is used for cooling a stirring pin and/or a shaft shoulder of a friction stir tool, it includes that the coolant is introduced into an inlet of a cooling channel, the cooling channel is provided inside the friction stir tool, and the inlet is provided on the side wall of the friction stir tool. The coolant flows downwards to the vicinity of the stirring pin and/or the shaft shoulder, the coolant turns upwards and flows out of the friction stir tool from an outlet. The outlet is provided on the side wall of the friction stir tool.

Abstract: A method for synthesizing diacylglycerol, comprising the following steps: (1) mixing an oil, a lipase and a solvent, and carrying out a hydrolysis reaction to obtain a hydrolyzate; and (2) under the action of a diacylglycerol lipase, performing an esterification reaction on the hydrolyzate obtained in step (1) with glycerol; the lipase in step (1) is lipase MAS1 or MAS1-H108A.

Abstract: The present disclosure relates to a fuel cell technology, and in particular, to a method and a system for analyzing hydrogen refueling action of a fuel cell vehicle based on a big data platform. By extracting a structural design parameter set of a hydrogen system of a fuel cell vehicle and a driving data set of the fuel cell vehicle in a preset time period, and further analyzing the obtained hydrogen refueling action data, it calculates a first hydrogen refueling feature set and a second hydrogen refueling feature set of the fuel cell vehicle and finally obtain hydrogen refueling action features corresponding to driving of the fuel cell vehicle in a preset time period.

Abstract: A power switching circuit includes a driving signal part, a first switch element, a second switch element, a first driving circuit and a second driving circuit. The first driving circuit includes a first resistor and a first connection branch, which are connected between a positive driving signal terminal of the driving signal part and a first driving terminal of the first switch element, respectively. The second driving circuit includes a third resistor and a second connection branch, which are connected between the positive driving signal terminal and the second driving terminal of the second switch element, respectively. In a same switching cycle, the turn-on time of the first switch element is earlier than the turn-on time of the second switch element and the turn-off time of the first switch element is earlier than the turn-off time of the second switch element.

Abstract: Disclosed herein are compositions and methods for treating diseases characterized by expanded microsatellite repeats by impeding or inhibiting transcription of expanded microsatellite repeats.

Abstract: This application provides a communication method and apparatus. The method includes: A terminal device receives a wake-up signal from a network device, where the wake-up signal includes a first identifier; and when the first identifier is an identifier of the terminal device, the terminal device receives paging-related information based on a length of the first identifier or initiates random access based on a length of the first identifier. In the technical solutions provided in this application, the terminal device may receive the paging-related information or initiate random access based on the length of the identifier of the terminal device in the wake-up signal, to reduce power consumption.

Abstract: Techniques described herein include forming respective (different) types of metal silicide layers for p-type source/drain regions and n-type source/drain regions of nanostructure transistors of a semiconductor device in a selective manner that reduces process complexity. For example, a p-type metal silicide layer may be selectively formed over a p-type source/drain region (e.g., such that the p-type metal silicide layer is not formed over the n-type source/drain region) of a first nanostructure transistor, and an n-type metal silicide layer may be formed over the n-type source/drain region (which may be selective or non-selective) of a second nanostructure transistor. This provides a low Schottky barrier height between the p-type metal silicide layer and the p-type source/drain region, as well as a low Schottky barrier height between the n-type metal silicide layer and the n-type source/drain region. This reduces the contact resistance for both p-type source/drain regions and n-type source/drain regions.

Abstract: The present disclosure provides an antenna and a temperature control system of the antenna. The antenna includes a feed unit layer, a phase shifter layer, an amplifying circuit disposed between the feed unit layer and the phase shifter layer, and a temperature control unit disposed on a side of the amplifying circuit. The amplifying circuit is configured to amplify a microwave signal fed from the feed unit layer and transmit the microwave signal to the phase shifter layer; the phase shifter layer is configured to shift a phase of the microwave signal by a preset phase shift amount; and the temperature control unit is configured to adjust a temperature of the amplifying circuit to adjust an operating temperature of the antenna. The temperature control unit is in direct contact with the amplifying circuit.

Abstract: The present invention relates to a cathepsin K inhibitor having the structure as shown in formula (0) and/or formula (II), wherein cyanopyrimidine or a keto group as an electrophilic group is a key group to exert a good inhibitory effect on cathepsin K. Further provided are a preparation method therefor and use thereof. The provided cathepsin K inhibitor has a relatively high inhibitory effect and selectivity, and is expected to be used for treating diseases including thyroid diseases, cardiovascular diseases, bone diseases and gum diseases.

Abstract: A display substrate, a manufacturing method thereof, and a display device. In the display substrate, the sub-pixel driving circuit includes a driving transistor and a first reset transistor, and a gate electrode of the first reset transistor is electrically connected to the reset signal line pattern, a first electrode of the first reset transistor is electrically connected to the initialization signal line pattern, and a second electrode of the first reset transistor is electrically connected to a gate electrode of the driving transistor; and the shielding pattern is electrically connected to the power signal line pattern, an orthographic projection of the shielding pattern on the substrate overlaps an orthographic projection of the first electrode of the first reset transistor on the substrate.