Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.

Abstract: A monolithically integrated power semiconductor component includes a semiconductor body having first and second regions each extending from a first surface of the semiconductor body to a second opposing surface of the body. A power field effect transistor structure formed in the first region has a first load terminal on the first surface and a second load terminal on the second surface. A power diode formed in the second region has a first load terminal on the first surface and a second load terminal on the second surface. The second load terminals of the power field effect transistor structure and power diode are formed by a common load terminal. An edge termination structure is arranged adjacent to the first surface and in a horizontal direction between the first load terminal of the power field effect transistor structure and the first load terminal of the power diode.

Abstract: A semiconductor device is at least partially formed in a semiconductor substrate, the substrate including first and second opposing main surfaces. The semiconductor device includes a cell field portion and a contact area, the contact area being electrically coupled to the cell field portion, the cell field portion including at least a transistor. The contact area includes a connection substrate portion insulated from other substrate portions and including a part of the semiconductor substrate, an electrode adjacent to the second main surface and in contact with the connection substrate portion, and a metal layer disposed over the first main surface, the connection substrate portion being electrically coupled to the metal layer to form an ohmic contact between the electrode and metal layer. The connection substrate portion is not electrically coupled to a component of the cell field portion by a conductive material disposed between the first and second main surfaces.

Abstract: A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.

Abstract: A MOS transistor semiconductor component includes a semiconductor body with first and second surfaces, a first contact electrode on the first surface, a second contact electrode on the second surface, a first insulation layer separating a via region at least from a drift region, a monocrystalline semiconductor region arranged in the via region and extending between the first surface and the second surface, a gate electrode electrically connected to the first contact electrode, a source electrode electrically insulated from the gate electrode, and arranged at least partially above the first surface, and a drain electrode electrically insulated from the second contact electrode on the second surface. The MOS transistor has a gate terminal formed by the second contact electrode and electrically connected to a gate-electrode of the MOS transistor through the via region. The gate-electrode is formed next to the first surface and disposed outside the via region.

Abstract: A semiconductor device in a semiconductor substrate includes a trench in a first main surface of the semiconductor substrate. The trench includes a first trench portion extending in a first direction and a second trench portion extending in the first direction. The first trench portion is connected with the second trench portion in a lateral direction. The first trench portion and the second trench portion are arranged one after the other along the first direction. The semiconductor device further includes a trench conductive structure having a conductive material disposed in the first trench portion, and a trench capacitor structure having a capacitor dielectric and a first capacitor electrode disposed in the second trench portion. The first capacitor electrode includes a layer lining a sidewall of the second trench portion.

Abstract: A method of operating a closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor comprises a culture liquid and is partially or completely surrounded by water of a water body. A density difference between the culture liquid and the surrounding water is provided so that the position of the photobioreactor in the water body is controlled. A closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor is adapted to comprise a culture liquid and to be partially or completely surrounded by water of a water body. The photobioreactor comprises means for determining the density difference between the culture liquid and the surrounding water.

Abstract: A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. The method further includes forming, in a common process, an oxide layer in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench, and removing the oxide layer from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.

Abstract: An integrated semiconductor device is provided. According to an embodiment, the integrated semiconductor device includes a semiconductor body having a first surface with a normal direction defining a vertical direction, an opposite surface, a first area including a vertical power field-effect transistor structure, a second area including a three-terminal step-down level-shifter, and a third area including a three-terminal step-up level-shifter. A terminal of the vertical power field-effect transistor structure is electrically connected with one of the three-terminal step-down level-shifter and the three-terminal step-up level-shifter.

Abstract: A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. Forming the semiconductor device further includes forming a conductive layer, a portion of the conductive layer being disposed beneath the gate electrode and insulated from the gate electrode.

Abstract: A MEMS device includes a fixed electrode and a movable electrode arranged isolated and spaced from the fixed electrode by a distance. The movable electrode is suspended against the fixed electrode by one or more spacers including an insulating material, wherein the movable electrode is laterally affixed to the one or more spacers.

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a body region, and a gate electrode structure adjacent to the body region. The source region and the drain region are disposed along a first direction, the first direction being parallel to the main surface. The body region is disposed between the source region and the drain region. The body region includes an upper body region at the main surface and a lower body region remote from the main surface. A first width of the lower body region is smaller than a second width of the upper body region. The first width and the second width are measured in a direction perpendicular to the first direction.

Abstract: In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate.

Abstract: A semiconductor workpiece includes a semiconductor substrate, at least two chip areas, components of semiconductor devices being formed in the semiconductor substrate in the at least two chip areas, and a separation trench disposed between adjacent chip areas. The separation trench is formed in a first main surface of the semiconductor substrate and extends from the first main surface to a second main surface of the semiconductor substrate. The second main surface is disposed opposite to the first main surface. The separation trench is filled with at least one sacrificial material.

Abstract: An integrated circuit is formed in a semiconductor substrate. The integrated circuit includes a trench formed in a first main surface of the semiconductor substrate. The trench includes a first trench portion and a second trench portion. The first trench portion is connected with the second trench portion. Openings of the first and second trench portions are adjacent to the first main surface. The integrated circuit further includes a trench transistor structure including a gate electrode disposed in the first trench portion, and a trench capacitor structure including a capacitor dielectric and a first capacitor electrode. The capacitor dielectric and the first capacitor electrode are disposed in the second trench portion. The first capacitor electrode includes a layer conformal with a sidewall of the second trench portion.

Abstract: An integrated circuit having an ESD protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 V and less than ?10 V. The integrated circuit additionally includes an ESD protection structure operable to protect the circuit section against electrostatic discharge between the first terminal and the second terminal. The ESD protection structure is operable with voltage differences between the first and second terminals of greater than +10 V and less than ?10 V without triggering. The ESD protection structure is electrically and optically coupled to a photon source such that photons emitted by the photon source upon ESD pulse loading are absorbable in the ESD protection structure and an avalanche breakdown is initiatable by electron-hole pairs generated by the absorbed photons.

Abstract: Methods for producing a semiconductor component that includes a transistor having a cell structure with a number of transistor cells monolithically integrated in a semiconductor body and electrically connected in parallel. In an example method, first trenches extending from the top side into the semiconductor body are produced, as are second trenches that each extend from the top side deeper into the semiconductor body than each of the first trenches. A first dielectric abutting on a first portion of the semiconductor body is produced at a surface of each of the first trenches. Also produced is a second dielectric at a surface of each of the second trenches. In each of the first trenches, a gate electrode is produced, after which a second portion of the semiconductor body is electrically insulated from the first portion of the semiconductor body by removing a bottom layer of the semiconductor body.

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode.

Abstract: A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.

Abstract: A bridge circuit is provided. The bridge circuit includes a first integrated semiconductor device having a high-side switch, a second integrated semiconductor device having a low-side switch electrically connected with the high-side switch, a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device, and a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device. Further, an integrated semiconductor device is provided.