Patents by Inventor Andrew D King
Andrew D King has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11941486Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: GrantFiled: April 20, 2023Date of Patent: March 26, 2024Assignee: D-WAVE SYSTEMS INC.Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T. E. Wilkinson, Trevor Michael Lanting
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Patent number: 11880741Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.Type: GrantFiled: August 7, 2020Date of Patent: January 23, 2024Assignee: D-WAVE SYSTEMS INC.Inventors: Robert B. Israel, Trevor M. Lanting, Andrew D. King
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Patent number: 11797874Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.Type: GrantFiled: July 28, 2021Date of Patent: October 24, 2023Assignee: 1372934 B.C. LTD.Inventors: Paul I. Bunyk, James King, Murray C. Thom, Mohammad H. Amin, Anatoly Smirnov, Sheir Yarkoni, Trevor M. Lanting, Andrew D. King, Kelly T. R. Boothby
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Publication number: 20230325695Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: ApplicationFiled: April 20, 2023Publication date: October 12, 2023Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T.E. Wilkinson, Trevor Michael Lanting
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Patent number: 11663512Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: GrantFiled: January 26, 2022Date of Patent: May 30, 2023Assignee: D-WAVE SYSTEMS INC.Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T. E. Wilkinson, Trevor Michael Lanting
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Patent number: 11567779Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.Type: GrantFiled: March 12, 2020Date of Patent: January 31, 2023Assignee: D-WAVE SYSTEMS INC.Inventors: William W. Bernoudy, James A. King, Andrew D. King
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Publication number: 20220222558Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: ApplicationFiled: January 26, 2022Publication date: July 14, 2022Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T.E. Wilkinson, Trevor Michael Lanting
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Patent number: 11263547Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: GrantFiled: January 26, 2018Date of Patent: March 1, 2022Assignee: D-WAVE SYSTEMS INC.Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T. E. Wilkinson, Trevor Michael Lanting
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Publication number: 20220019929Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.Type: ApplicationFiled: July 28, 2021Publication date: January 20, 2022Inventors: Paul I. Bunyk, James King, Murray C. Thom, Mohammad H. Amin, Anatoly Smirnov, Sheir Yarkoni, Trevor M. Lanting, Andrew D. King, Kelly T. R. Boothby
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Patent number: 11100418Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.Type: GrantFiled: February 14, 2019Date of Patent: August 24, 2021Assignee: D-WAVE SYSTEMS INC.Inventors: Paul I. Bunyk, James King, Murray C. Thom, Mohammad H. Amin, Anatoly Yu Smirnov, Sheir Yarkoni, Trevor M. Lanting, Andrew D. King, Kelly T. R. Boothby
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Patent number: 11023821Abstract: A system and method of operation embeds a three-dimensional structure in a topology of an analog processor, for example a quantum processor. The analog processor may include a plurality of qubits arranged in tiles or cells. A number of qubits and communicatively coupled as logical qubits, each logical qubit which span across a plurality of tiles or cells of the qubits. Communicatively coupling between qubits of any given logical qubit can be implemented via application or assignment of a first ferromagnetic coupling strength to each of a number of couplers that communicatively couple the respective qubits in the logical qubit. Other ferromagnetic coupling strengths can be applied or assigned to couplers that communicatively couple qubits that are not part of the logical qubit. The first ferromagnetic coupling strength may be substantially higher than the other ferromagnetic coupling strengths.Type: GrantFiled: January 26, 2018Date of Patent: June 1, 2021Assignee: D-WAVE SYSTEMS INC.Inventors: Richard G. Harris, Kelly T. R. Boothby, Andrew D. King
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Publication number: 20200372393Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.Type: ApplicationFiled: August 7, 2020Publication date: November 26, 2020Inventors: Robert B. Israel, Trevor M. Lanting, Andrew D. King
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Patent number: 10789540Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.Type: GrantFiled: April 13, 2017Date of Patent: September 29, 2020Assignee: D-WAVE SYSTEMS INC.Inventors: Andrew D. King, Robert B. Israel, Paul I. Bunyk, Kelly T. R. Boothby, Steven P. Reinhardt, Aidan P. Roy, James A. King, Trevor M. Lanting, Abraham J. Evert
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Publication number: 20200293331Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.Type: ApplicationFiled: March 12, 2020Publication date: September 17, 2020Inventors: William W. Bernoudy, James A. King, Andrew D. King
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Publication number: 20190266508Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.Type: ApplicationFiled: February 14, 2019Publication date: August 29, 2019Inventors: Paul I. Bunyk, James King, Murray C. Thom, Mohammad H. Amin, Anatoly Yu Smirnov, Sheir Yarkoni, Trevor M. Lanting, Andrew D. King, Kelly T. R. Boothby
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Publication number: 20180218281Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.Type: ApplicationFiled: January 26, 2018Publication date: August 2, 2018Inventors: Steven P. Reinhardt, Andrew D. King, Loren J. Swenson, Warren T.E. Wilkinson, Trevor Michael Lanting
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Publication number: 20180218280Abstract: A system and method of operation embeds a three-dimensional structure in a topology of an analog processor, for example a quantum processor. The analog processor may include a plurality of qubits arranged in tiles or cells. A number of qubits and communicatively coupled as logical qubits, each logical qubit which span across a plurality of tiles or cells of the qubits. Communicatively coupling between qubits of any given logical qubit can be implemented via application or assignment of a first ferromagnetic coupling strength to each of a number of couplers that communicatively couple the respective qubits in the logical qubit. Other ferromagnetic coupling strengths can be applied or assigned to couplers that communicatively couple qubits that are not part of the logical qubit. The first ferromagnetic coupling strength may be substantially higher than the other ferromagnetic coupling strengths.Type: ApplicationFiled: January 26, 2018Publication date: August 2, 2018Inventors: Richard G. Harris, Kelly T.R. Boothby, Andrew D. King
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Publication number: 20170300817Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.Type: ApplicationFiled: April 13, 2017Publication date: October 19, 2017Inventors: Andrew D. King, Robert B. Israel, Paul I. Bunyk, Tomas J. Boothby, Steven P. Reinhardt, Aidan P. Roy, James A. King, Trevor M. Lanting, Abraham J. Evert
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Patent number: 9634519Abstract: An adjustable and portable mounting system for a tablet computing device and solar based charging system is described. An example mounting system for a tablet computing device includes a tablet enclosure with a plurality of gripping portions adjustable to hold tablets with different sizes and shapes, and each gripping portion is configured to grip a corner of the tablet computing device. The mounting system further includes an adjustable solar panel support, which is pivotally attached to the tablet enclosure and where a solar panel placed within the support can be configured to provide trickle charging to the tablet and to orient 360 degrees about three axes of rotation. The mounting system also includes a table stand, which is mounted to the tablet enclosure and provides support of the tablet computing device on a flat surface with a wide range of viewing angles. The mounting system also includes a connector configured to couple to a tripod stand mount, or a similar device.Type: GrantFiled: August 19, 2013Date of Patent: April 25, 2017Assignee: MITRE CORPORATIONInventors: Andrew D. King, Jamie R. Hood, Matthew D. Patron, Steven M. Taskovics
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Publication number: 20140326840Abstract: An adjustable and portable mounting system for a tablet computing device and solar based charging system is described. An example mounting system for a tablet computing device includes a tablet enclosure with a plurality of gripping portions adjustable to hold tablets with different sizes and shapes, and each gripping portion is configured to grip a corner of the tablet computing device. The mounting system further includes an adjustable solar panel support, which is pivotally attached to the tablet enclosure and where a solar panel placed within the support can be configured to provide trickle charging to the tablet and to orient 360 degrees about three axes of rotation. The mounting system also includes a table stand, which is mounted to the tablet enclosure and provides support of the tablet computing device on a flat surface with a wide range of viewing angles. The mounting system also includes a connector configured to couple to a tripod stand mount, or a similar device.Type: ApplicationFiled: August 19, 2013Publication date: November 6, 2014Applicant: The MITRE CorporationInventors: Andrew D. King, Jamie R. Hood, Matthew D. Patron, Steven M. Taskovics