Patents by Inventor Anish A. Khandekar

Anish A. Khandekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160284719
    Abstract: Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive levels. Cavities are formed to extend into the conductive levels along sidewalls of the opening. At least one of the cavities is formed to be shallower than one or more others of the cavities. Charge-blocking dielectric and charge-storage structures are formed within the cavities. Some embodiments include an integrated structure having a stack of alternating insulative and conductive levels. Cavities extend into the conductive levels. At least one of the cavities is shallower than one or more others of the cavities by at least about 2 nanometers. Charge-blocking dielectric is within the cavities. Charge-storage structures are within the cavities.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 29, 2016
    Inventors: Hongbin Zhu, Gordon A. Haller, Charles H. Dennison, Anish A. Khandekar, Brett D. Lowe, Lining He, Brian Cleereman
  • Publication number: 20150279851
    Abstract: 3D NAND memory structures and related method are provided. In some embodiments such structures can include a control gate material and a floating gate material disposed between a first insulating layer and a second insulating layer, an interpoly dielectric (IPD) layer disposed between the floating gate material and control gate material such that the IPD layer electrically isolates the control gate material from the floating gate material, and a tunnel dielectric material deposited on the floating gate material opposite the control gate material.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 1, 2015
    Inventors: Darwin Fan, Sateesh Koka, Gordon Haller, John Hopkins, Shyam Surthi, Anish Khandekar
  • Patent number: 9087737
    Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: July 21, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Alex Schrinsky, Anish Khandekar, Pavan Aella, Niraj B. Rana
  • Publication number: 20140349454
    Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.
    Type: Application
    Filed: August 11, 2014
    Publication date: November 27, 2014
    Inventors: Alex Schrinsky, Anish Khandekar, Pavan Aella, Niraj B. Rana
  • Patent number: 8802525
    Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Alex Schrinsky, Anish Khandekar, Pavan Aella, Niraj B. Rana
  • Patent number: 8709929
    Abstract: Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion regions in a semiconductor, the one or more diffusion regions being adjacent to a gate formed adjacent to a surface of the semiconductor (e.g., a semiconductor substrate). The one or more diffusion regions comprise a first width at a depth below the surface of the semiconductor and a second width near the surface of the semiconductor, the second width of the one or more diffusion regions being less than about 40% greater than the first width.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: April 29, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Lequn Liu, Yongjun Jeff Hu, Anish A. Khandekar
  • Publication number: 20130040429
    Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.
    Type: Application
    Filed: August 8, 2011
    Publication date: February 14, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Alex Schrinsky, Anish Khandekar, Pavan Aella, Niraj B. Rana
  • Publication number: 20120329258
    Abstract: Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion region in a semiconductor, the one or more diffusion regions being adjacent to a gate formed adjacent to a surface of the semiconductor (e.g., a semiconductor substrate). The one or more diffusion regions comprise a first width at a depth below the surface of the semiconductor and a second width near the surface of the semiconductor, the second width of the one or more diffusion regions being less than about 40% greater than the first width.
    Type: Application
    Filed: September 5, 2012
    Publication date: December 27, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Lequn Liu, Yongjun Jeff Hu, Anish A. Khandekar
  • Patent number: 8283708
    Abstract: Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion region in a semiconductor, the one or more diffusion regions being adjacent to a gate formed adjacent to a surface of the semiconductor (e.g., a semiconductor substrate). The one or more diffusion regions comprise a first width at a depth below the surface of the semiconductor and a second width near the surface of the semiconductor, the second width of the one or more diffusion regions being less than about 40% greater than the first width.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: October 9, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Lequn Liu, Yongjun Jeff Hu, Anish A. Khandekar
  • Patent number: 7943463
    Abstract: A number of methods are provided for semiconductor processing. One such method includes depositing a first precursor material on a surface at a particular temperature to form an undoped polysilicon. The method also includes depositing a second precursor material on a surface of the undoped polysilicon at substantially the same temperature, wherein the undoped polysilicon serves as a seed to accelerate forming a doped polysilicon.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: May 17, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Anish Khandekar, Ervin T. Hill, Jixin Yu, Jeffrey B. Hull
  • Publication number: 20110068378
    Abstract: Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion region in a semiconductor, the one or more diffusion regions being adjacent to a gate formed adjacent to a surface of the semiconductor (e.g., a semiconductor substrate). The one or more diffusion regions comprise a first width at a depth below the surface of the semiconductor and a second width near the surface of the semiconductor, the second width of at the one or more diffusion regions being less than about 40% greater than the first width.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Lequn Liu, Yongjun Jeff Hu, Anish A. Khandekar
  • Publication number: 20100255664
    Abstract: A number of methods are provided for semiconductor processing. One such method includes depositing a first precursor material on a surface at a particular temperature to form an undoped polysilicon. The method also includes depositing a second precursor material on a surface of the undoped polysilicon at substantially the same temperature, wherein the undoped polysilicon serves as a seed to accelerate forming a doped polysilicon.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Anish Khandekar, Ervin T. Hill, Jixin Yu, Jeffrey B. Hull