Patents by Inventor Annette L. Martin

Annette L. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7057263
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: June 6, 2006
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Publication number: 20040124441
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Application
    Filed: December 11, 2003
    Publication date: July 1, 2004
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 6693345
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: February 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 6451504
    Abstract: A semiconductor processing method of promoting adhesion of photoresist to an outer substrate layer predominately comprising silicon nitride includes, a) providing a substrate; b) providing an outer layer of Si3N4 outwardly of the substrate, the outer Si3N4 layer having an outer surface; c) covering the outer Si3N4 surface with a discrete photoresist adhesion layer; and d) depositing a layer of photoresist over the outer Si3N4 surface having the intermediate discrete adhesion layer thereover, the photoresist adhering to the Si3N4 layer with a greater degree of adhesion than would otherwise occur if the intermediate discrete adhesion layer were not present.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: September 17, 2002
    Assignee: Micron Technology, Inc.
    Inventors: J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 6417559
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: July 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Publication number: 20020047202
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Application
    Filed: November 26, 2001
    Publication date: April 25, 2002
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 6323139
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: November 27, 2001
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Scott Jeffrey DeBoer, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Publication number: 20010044218
    Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.
    Type: Application
    Filed: December 7, 1999
    Publication date: November 22, 2001
    Inventors: JOHN T. MOORE, SCOTT JEFFREY DEBOER, MARK FISCHER, J. BRETT ROLFSON, ANNETTE L. MARTIN, ARDAVAN NIROOMAND
  • Patent number: 6297171
    Abstract: A semiconductor processing method of promoting adhesion of photoresist to an outer substrate layer predominately comprising silicon nitride includes, a) providing a substrate; b) providing an outer layer of Si3N4 outwardly of the substrate, the outer Si3N4 layer having an outer surface; c) covering the outer Si3N4 surface with a discrete photoresist adhesion layer; and d) depositing a layer of photoresist over the outer Si3N4 surface having the intermediate discrete adhesion layer thereover, the photoresist adhering to the Si3N4 layer with a greater degree of adhesion than would otherwise occur if the intermediate discrete adhesion layer were not present.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: October 2, 2001
    Assignee: Micron Technology Inc.
    Inventors: J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Publication number: 20010023051
    Abstract: A semiconductor processing method of promoting adhesion of photoresist to an outer substrate layer predominately comprising silicon nitride includes, a) providing a substrate; b) providing an outer layer of Si3N4 outwardly of the substrate, the outer Si3N4 layer having an outer surface; c) covering the outer Si3N4 surface with a discrete photoresist adhesion layer; and d) depositing a layer of photoresist over the outer Si3N4 surface having the intermediate discrete adhesion layer thereover, the photoresist adhering to the Si3N4 layer with a greater degree of adhesion than would otherwise occur if the intermediate discrete adhesion layer were not present.
    Type: Application
    Filed: January 31, 2001
    Publication date: September 20, 2001
    Inventors: J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 5926739
    Abstract: A semiconductor processing method of promoting adhesion of photoresist to an outer substrate layer predominately comprising silicon nitride includes, a) providing a substrate; b) providing an outer layer of Si.sub.3 N.sub.4 outwardly of the substrate, the outer Si.sub.3 N.sub.4 layer having an outer surface; c) covering the outer Si.sub.3 N.sub.4 surface with a discrete photoresist adhesion layer; and d) depositing a layer of photoresist over the outer Si.sub.3 N.sub.4 surface having the intermediate discrete adhesion layer thereover, the photoresist adhering to the Si.sub.3 N.sub.4 layer with a greater degree of adhesion than would otherwise occur if the intermediate discrete adhesion layer were not present. Further, a method in accordance with the invention includes, i) providing an outer layer of Si.sub.3 N.sub.4 outwardly of the substrate, the outer Si.sub.3 N.sub.4 layer having an outer surface; ii) transforming the outer Si.sub.3 N.sub.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: July 20, 1999
    Assignee: Micron Technology, Inc.
    Inventors: J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand
  • Patent number: 5926742
    Abstract: A method for correcting the shape of a semiconductor structure. According to the method the shape of a semiconductor structure is initially determined to discern the presence, location and magnitude of structural deformities including warp and bow. Information derived from the topography of the structure is then used to control a heating apparatus. More particularly, individual zones or elements of a multiple zone heating assembly are selectively controlled to direct heat radiation of nonuniform intensities toward different regions of the structure to effect non-isothermal conditions within the structure and thereby reduce deformities that were determined to be present in the structure prior to shape correction.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: July 20, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, Annette L. Martin
  • Patent number: 5851929
    Abstract: A method for correcting the shape of a semiconductor structure. According to the method the shape of a semiconductor structure is initially determined to discern the presence, location and magnitude of structural deformities including warp and bow. Information derived from the topography of the structure is then used to control a heating apparatus. More particularly, individual zones or elements of a multiple zone heating assembly are selectively controlled to direct heat radiation of nonuniform intensities toward different regions of the structure to effect non-isothermal conditions within the structure and thereby reduce deformities that were determined to be present in the structure prior to shape correction.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: December 22, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, Annette L. Martin
  • Patent number: 5425392
    Abstract: The present invention teaches a method for reducing sheet resistance in the fabrication of semiconductor wafers. A silicon substrate having a gate oxide layer thereon is provided in a chamber. Subsequently, a polysilicon layer is formed superjacent the gate oxide layer in situ by exposing the silicon substrate to a first gas comprising at least one of silane, disilane, and dichlorosilane, and radiant energy at a temperature substantially within the range of 500.degree. C. to 1250.degree. C. for at least 10 seconds. The polysilicon substrate can be doped with a material such as phosphorus, arsenic and boron for example, by exposing the polysilicon to a second gas under the stated conditions. A conductive layer comprising at least one of tungsten silicide (WSi.sub.x) and titanium silicide (TiSi.sub.x) can be formed superjacent the polysilicon by exposing the polysilicon to a third gas comprising at least one of WF.sub.6, TMAT and TiCl.sub.4.
    Type: Grant
    Filed: May 26, 1993
    Date of Patent: June 20, 1995
    Assignee: Micron Semiconductor, Inc.
    Inventors: Randhir P. S. Thakur, Fernando Gonzalez, Annette L. Martin
  • Patent number: 5416045
    Abstract: A method of chemical vapor depositing a titanium nitride layer on a semiconductor wafer within a chemical vapor deposition reactor includes: a) positioning a wafer within a chemical vapor deposition reactor; b) injecting gaseous TiCl.sub.4, NH.sub.3 and N.sub.2 to within the reactor; and c) maintaining the reactor at a selected pressure and a selected temperature which are effective for reacting the TiCl.sub.4 and NH.sub.3 to deposit a uniform film comprising titanium nitride on the wafer, the selected temperature being less than or equal to about 500.degree. C. With a TiN film outwardly exposed, a wafer is annealed by the sequential steps of, a) rapid thermal processing the wafer having the outwardly exposed TiN film to a temperature from about 580.degree. C. to about 700.degree. C.; b) exposing the wafer to NH.sub.3 gas at a temperature from about 580.degree. C. to about 700.degree. C.
    Type: Grant
    Filed: February 18, 1993
    Date of Patent: May 16, 1995
    Assignee: Micron Technology, Inc.
    Inventors: Ralph E. Kauffman, Michael J. Prucha, James Beck, Randhir P. S. Thakur, Annette L. Martin
  • Patent number: 5382551
    Abstract: A method is disclosed for reducing the effects of semiconductor deformities. Initially, a semiconductor substrate is provided. The substrate has at least one layer superjacent the substrate and at least one layer subjacent the substrate. Subsequently, the semiconductor structure is examined for warp and bow type deformities. As a result of this examination, the warp and bow measurements of the semiconductor structure are compared with a reference. In the event that the measured warp and bow exceed a predetermined tolerance, either the thickness of the layer superjacent or the thickness of the layer subjacent is reduced. This reducing step can be accomplished by chemical and/or mechanical planarization, dry etching, wet etching or plasma etching.
    Type: Grant
    Filed: April 9, 1993
    Date of Patent: January 17, 1995
    Assignee: Micron Semiconductor, Inc.
    Inventors: Randhir P. S. Thakur, Annette L. Martin
  • Patent number: 5364187
    Abstract: A system is disclosed for externally measuring the temperature of a substrate having a reflective surface within a chamber. The system comprises a first light source having sufficient intensity for bombarding the reflective surface with photons, thereby heating the surface. The first light source has an output level and a wavelength substantially in the absorption band of silicon. The system also comprises means for exposing the substrate to a gas in order to form a layer superjacent the reflective surface. A sensor, preferably a photo detector, for sensing changes in the reflectivity of the surface is included. In one embodiment of the present invention, the sensor comprises a second light source and a sensor, for sensing the reflectivity of the surface caused by the reflecting photons. Furthermore, the system comprises control circuitry for controlling the first light source in response to the sensor; the control circuitry being coupled to the sensor by a feedback loop.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: November 15, 1994
    Assignee: Micron Semiconductor, Inc.
    Inventors: Randhir P. S. Thakur, Gurtej S. Sandhu, Annette L. Martin
  • Patent number: 5360769
    Abstract: A method and system for fabricating semiconductor wafers is disclosed wherein an atomically clean, semiconductor substrate having a surface is provided in a rapid thermal processing chamber. One embodiment involves cleaning the substrate by exposing it to a first gas at a temperature substantially within the range of 850.degree. C. to 1250.degree. C. for approximately 10 to 60 seconds. Subsequently, a coating having a first thickness is formed superjacent the substrate surface by introducing a second gas at a temperature substantially within the range of 850.degree. C. to 1250.degree. C. for approximately 5 to 30 seconds in the chamber. The resultant coating, depending on the gas selected, comprises either SiO.sub.2 or Si-F.Subsequently, the substrate having the coating is exposed to a third gas at a temperature substantially within the range of 900.degree. C. to 1050.degree. C. for approximately 30 minutes to one hour, thereby forming a silicon dioxide layer.
    Type: Grant
    Filed: December 17, 1992
    Date of Patent: November 1, 1994
    Assignee: Micron Semiconductor, Inc.
    Inventors: Randhir P. S. Thakur, Annette L. Martin, Ralph E. Kauffman
  • Patent number: 5350236
    Abstract: A method is disclosed for continuously measuring the temperature of a semiconductor substrate in a chamber is disclosed. The first step of the method involves providing a substantially clean semiconductor substrate having a layer a reflective surface thereon into a chamber. A film is formed superjacent the surface by introducing a gas comprising at least one of N.sub.2, NH.sub.3, O.sub.2, N.sub.2 O, Ar, Ar--H.sub.2, H.sub.2, GeH.sub.4, or any fluorine based gas and photon energy in situ. The photon energy, having a wavelength substantially in the absorption band of silicon, generates a temperature substantially within the range of 500.degree. C. to 1250.degree. C. Subsequently, the reflectivity of the surface is measured prior to introducing the gas, and continuously, while forming the film until the film is substantially formed. The substrate is exposed to photon energy having a power level responsive to the measured reflectivities of the film.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: September 27, 1994
    Assignee: Micron Semiconductor, Inc.
    Inventors: Randhir P. S. Thakur, Gurtej S. Sandhu, Annette L. Martin
  • Patent number: RE36050
    Abstract: A method is disclosed for continuously measuring the temperature of a semiconductor substrate in a chamber is disclosed. The first step of the method involves providing a substantially clean semiconductor substrate having a layer a reflective surface thereon into a chamber. A film is formed superjacent the surface by introducing a gas comprising at least one of N.sub.2, NH.sub.3, O.sub.2, N.sub.2 O, Ar, Ar--H.sub.2, H.sub.2, GeH.sub.4, or any fluorine based gas and photon energy in situ. The photon energy, having a wavelength substantially in the absorption band of silicon, generates a temperature substantially within the range of 500.degree. C. to 1250.degree. C. Subsequently, the reflectivity of the surface is measured prior to introducing the gas, and continuously, while forming the film until the film is substantially formed. The substrate is exposed to photon energy having a power level responsive to the measured reflectivities of the film.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: January 19, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, Gurtej S. Sandhu, Annette L. Martin