Abstract: Performing a Fast Fourier Transformation (FFT) with increased resolution by applying an adaptive left shift to signed binary integers of an input of a radix kernel and adaptive right shift to signed binary integers of an output of a butterfly of the radix kernel which is based on a leading bit count of the input. The adaptive left shift increases a resolution of the radix kernel computation and the adaptive right shift determines a number of bits of the increased resolution preserved in an output of the radix kernel.

Abstract: A dual-acting single-spring twin-tube shock absorber assembly is provided. The assembly includes at least one twin-tube shock absorber component; at least one piston rod component coaxially coupled with said twin-tube shock absorber component and configured to telescope in and out of out of the same with compression and extension stroke respectively; one helical compression spring disposed outside the outer wall of said twin-tube shock absorber component; at least one spring guide component and at least one spring actuator component which is adapted to perform the dual action of achieving compression and extension force and a neutral position at the center without preload.

Abstract: Exemplary aspects for a specific example concern a radar system having sensor circuitry including multiple radar sensors to provide sensor data via multiple virtual channels and multiple data types, a memory circuit with memory buffers, and a bus-interface circuit to control bus interconnects for bus communications involving a radar signal transmitter and the memory circuit. Radar signals are received and processed, via data acquisition path circuitry in multiple circuit paths and via streams of data in response to and to accommodate the operations of the sensor circuitry. A master controller conveys data, via the bus-interface circuit, to the buffers for the sensor data, and generates selectable-type transactions to be linked in selected ones of the buffers, in response to the data provided from the sensor circuitry and based on the sensor data being provided via different ones of the multiple virtual channels and of the multiple data types.

Abstract: A method of acquiring data, a computer program product for implementing the method, a system for acquiring data, and a vehicle including the system. The method includes determining one or more data types and virtual channels required for one or more applications. The method also includes allocating a plurality of circular buffers in memory according to the determined data type(s) and virtual channel(s). One or more of the circular buffers are allocated to safety data lines. The remaining circular buffers are allocated to functional data lines. The method further includes storing at least one functional data line in a circular buffer allocated to functional data lines according to a data type and virtual channel of the functional data line. The method also includes storing at least one safety data line in a circular buffer allocated to safety data lines.

Abstract: A dual-acting single-spring twin-tube shock absorber assembly is provided. The assembly includes at least one twin-tube shock absorber component; at least one piston rod component coaxially coupled with said twin-tube shock absorber component and configured to telescope in and out of out of the same with compression and extension stroke respectively; one helical compression spring disposed outside the outer wall of said twin-tube shock absorber component; at least one spring guide component and at least one spring actuator component which is adapted to perform the dual action of achieving compression and extension force and a neutral position at the center without preload.

Abstract: Exemplary aspects for a specific example concern a radar system having sensor circuitry including multiple radar sensors to provide sensor data via multiple virtual channels and multiple data types, a memory circuit with memory buffers, and a bus-interface circuit to control bus interconnects for bus communications involving a radar signal transmitter and the memory circuit. Radar signals are received and processed, via data acquisition path circuitry in multiple circuit paths and via streams of data in response to and to accommodate the operations of the sensor circuitry. A master controller conveys data, via the bus-interface circuit, to the buffers for the sensor data, and generates selectable-type transactions to be linked in selected ones of the buffers, in response to the data provided from the sensor circuitry and based on the sensor data being provided via different ones of the multiple virtual channels and of the multiple data types.

Abstract: A communication system including a physical layer circuit, a timer circuit, and a turnaround controller. The physical layer circuit provides an early turnaround indication upon detection of a turnaround command and before completion of the turnaround command. The timer circuit is programmed with a timeout value indicative of a maximum time of a turnaround procedure initiated by the turnaround command. The turnaround controller starts the timer circuit in response to the early turnaround indication. A transmit controller may begin retrieving information to transmit from a memory in response to the early turnaround indication, and may begin transmitting the retrieved information if the turnaround procedure completes before timeout of the timer circuit. The retrieved information may be configuration information for a sensor. The turnaround controller provides an error indication if the timer circuit times out indicating a turnaround error. The error indication enables remedial action to be taken.

Abstract: A radar and/or camera system may include a receiver subsystem that receives image and/or radar data from one or more imaging/radar subsystems via multiple data lanes. A vision processor of the system may receive a data stream that includes the image and/or radar data and one or more synchronization signals including a vertical sync signal. The receiver subsystem may include a timing event generator that toggles the vertical sync signal in response to detecting certain timing event errors in order to correct these timing event errors without interrupting normal operation of the system. The receiver subsystem may include sync monitoring circuitry that may detect synchronization errors that occur when synchronization signal pulses received by the receiver subsystem do not match a predefined synchronization pattern within a scan window of predefined length. The system may be reset in response to detection of such synchronization errors.

Abstract: A communication system including a physical layer circuit, a timer circuit, and a turnaround controller. The physical layer circuit provides an early turnaround indication upon detection of a turnaround command and before completion of the turnaround command. The timer circuit is programmed with a timeout value indicative of a maximum time of a turnaround procedure initiated by the turnaround command. The turnaround controller starts the timer circuit in response to the early turnaround indication. A transmit controller may begin retrieving information to transmit from a memory in response to the early turnaround indication, and may begin transmitting the retrieved information if the turnaround procedure completes before timeout of the timer circuit. The retrieved information may be configuration information for a sensor. The turnaround controller provides an error indication if the timer circuit times out indicating a turnaround error. The error indication enables remedial action to be taken.

Abstract: A radar and/or camera system may include a receiver subsystem that receives image and/or radar data from one or more imaging/radar subsystems via multiple data lanes. A vision processor of the system may receive a data stream that includes the image and/or radar data and one or more synchronization signals including a vertical sync signal. The receiver subsystem may include a timing event generator that toggles the vertical sync signal in response to detecting certain timing event errors in order to correct these timing event errors without interrupting normal operation of the system. The receiver subsystem may include sync monitoring circuitry that may detect synchronization errors that occur when synchronization signal pulses received by the receiver subsystem do not match a predefined synchronization pattern within a scan window of predefined length. The system may be reset in response to detection of such synchronization errors.

Abstract: A system and method for real-time data transfer on a system-on-chip (SoC) allows MIPI-CSI (camera serial interface) data received on a first interface to be output on another MIPI-CSI interface without using system memory or delaying the loopback path. The system includes a CSI receiver, a loopback buffer, and a CSI transmitter. The loopback buffer is used for the data transfer between the CSI receiver and the CSI transmitter. The CSI transmitter receives a payload included in a data packet from the CSI receiver by way of the loopback buffer. The CSI receiver communicates a packet header of the data packet to the CSI transmitter. The CSI transmitter reads the payload from the loopback buffer based on the packet header and at least one of a buffer threshold capacity and payload size.

Abstract: A method of acquiring data, a computer program product for implementing the method, a system for acquiring data, and a vehicle including the system. The method includes determining one or more data types and virtual channels required for one or more applications. The method also includes allocating a plurality of circular buffers in memory according to the determined data type(s) and virtual channel(s). One or more of the circular buffers are allocated to safety data lines. The remaining circular buffers are allocated to functional data lines. The method further includes storing at least one functional data line in a circular buffer allocated to functional data lines according to a data type and virtual channel of the functional data line. The method also includes storing at least one safety data line in a circular buffer allocated to safety data lines.

Abstract: A system and method for real-time data transfer on a system-on-chip (SoC) allows MIPI-CSI (camera serial interface) data received on a first interface to be output on another MIPI-CSI interface without using system memory or delaying the loopback path. The system includes a CSI receiver, a loopback buffer, and a CSI transmitter. The loopback buffer is used for the data transfer between the CSI receiver and the CSI transmitter. The CSI transmitter receives a payload included in a data packet from the CSI receiver by way of the loopback buffer. The CSI receiver communicates a packet header of the data packet to the CSI transmitter. The CSI transmitter reads the payload from the loopback buffer based on the packet header and at least one of a buffer threshold capacity and payload size.