Patents by Inventor Anthony J. Lochtefeld

Anthony J. Lochtefeld has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10164015
    Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond, Eugene A. Fitzgerald
  • Patent number: 10074536
    Abstract: Lattice-mismatched materials having configurations that trap defects within sidewall-containing structures.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: September 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 10050145
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed substrate including a bulk material, a strained layer directly on the relaxed substrate, where a strain of the strained layer is not induced by the relaxed substrate, and a transistor formed on the strained layer.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Publication number: 20180197954
    Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
    Type: Application
    Filed: March 1, 2018
    Publication date: July 12, 2018
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond, Eugene A. Fitzgerald
  • Patent number: 10002981
    Abstract: Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: June 19, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: James Fiorenza, Anthony J. Lochtefeld
  • Publication number: 20180108741
    Abstract: A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 19, 2018
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Patent number: 9934967
    Abstract: Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping and epitaxial layer overgrowth. A method includes forming an opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: April 3, 2018
    Assignee: Taiwan Semiconductor Manufacturing CO., LTD.
    Inventors: Jennifer M. Hydrick, Jizhong Li, Zhinyuan Cheng, James Fiorenza, Jie Bai, Ji-Soo Park, Anthony J. Lochtefeld
  • Patent number: 9923057
    Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: March 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond, Eugene A. Fitzgerald
  • Patent number: 9859381
    Abstract: A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: January 2, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Patent number: 9853118
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: December 26, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9818819
    Abstract: Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: November 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jie Bai, Anthony J. Lochtefeld, Ji-Soo Park
  • Publication number: 20170179285
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed substrate including a bulk material, a strained layer directly on the relaxed substrate, where a strain of the strained layer is not induced by the relaxed substrate, and a transistor formed on the strained layer.
    Type: Application
    Filed: March 8, 2017
    Publication date: June 22, 2017
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Publication number: 20170117176
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: January 6, 2017
    Publication date: April 27, 2017
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Publication number: 20170092734
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Application
    Filed: December 9, 2016
    Publication date: March 30, 2017
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9601623
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: March 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Publication number: 20170077330
    Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.
    Type: Application
    Filed: November 23, 2016
    Publication date: March 16, 2017
    Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
  • Patent number: 9576951
    Abstract: Materials, methods, structures and device including the same can provide a semiconductor device such as an LED using an active region corresponding to a non-polar face or surface of III-V semiconductor crystalline material. In some embodiments, an active diode region contains more non-polar III-V material oriented to a non-polar plane than III-V material oriented to a polar plane. In other embodiments, a bottom region contains more non-polar m-plane or a-plane surface area GaN than polar c-plane surface area GaN facing an active region.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9548236
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: January 17, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Patent number: 9543472
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9508724
    Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: November 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mayank T. Bulsara, Anthony J. Lochtefeld, Matthew T. Currie