Patents by Inventor Anton Mauder

Anton Mauder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11171230
    Abstract: In an embodiment, a semiconductor device is provided. The semiconductor device includes: a semiconductor body of a first conductivity type having opposing first and second major surfaces; a gate arranged in a trench extending into the semiconductor body from the first major surface; a body region of a second conductivity type; a source region of the first conductivity type arranged on the body region and having first and second dopant species. The source region forms a pn-junction with the body junction, the pn-junction being arranged at a depth dpn from the first major surface, wherein 50 nm<dpn<300 nm. A drain region of the first conductivity type is arranged in the semiconductor body under the trench.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: November 9, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Johannes Georg Laven, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 11146258
    Abstract: A method for protecting a power switch during turn-on includes sensing that a change in current through the power switch is in regulation, measuring a time the change in current through the power switch is in regulation, and comparing the time the change in current through the power switch is in regulation to a reference time. An over current signal, which can be used to disable the power switch, is generated if the time the change in current through the power switch is in excess of the reference time.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: October 12, 2021
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Karl Norling, Johannes Groeger, Anton Mauder, Bernhard Wicht
  • Publication number: 20210296479
    Abstract: An RC IGBT includes, in an active region, an IGBT section and at least three diode sections. The arrangement of the diode sections obeys a design rule.
    Type: Application
    Filed: March 16, 2021
    Publication date: September 23, 2021
    Inventors: Frank Dieter Pfirsch, Erich Griebl, Viktoryia Lapidus, Anton Mauder, Christian Philipp Sandow, Antonio Vellei
  • Patent number: 11121220
    Abstract: A semiconductor device includes a silicon carbide semiconductor body including a source region of a first conductivity type, a body region of a second conductivity type, shielding regions of the second conductivity type and compensation regions of the second conductivity type. Trench structures extend from a first surface into the silicon carbide semiconductor body along a vertical direction. Each of the trench structures includes an auxiliary electrode at a bottom of the trench structure and a gate electrode between the auxiliary electrode and the first surface. The auxiliary electrode is electrically insulated from the gate electrode. The auxiliary electrode of each of the trench structures is adjoined by at least one of the shielding regions at the bottom of the trench structure. Each of the shielding regions is adjoined by at least one of the compensation regions at the bottom of the shielding region.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: September 14, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Publication number: 20210272843
    Abstract: A power semiconductor device includes: first and second trenches extending from a surface of a semiconductor body along a vertical direction and laterally confining a mesa region along a first lateral direction; source and body regions in the mesa region electrically connected to a first load terminal; and a first insulation layer having a plurality of insulation blocks, two of which laterally confine a contact hole. The first load terminal extends into the contact hole to contact the source and body regions at the mesa region surface. A first insulation block laterally overlaps with the first trench. A second insulation block laterally overlaps with the second trench. The first insulation block has a first lateral concentration profile of a first implantation material of the source region along the first lateral direction that is different from a corresponding second lateral concentration profile for the second insulation block.
    Type: Application
    Filed: May 20, 2021
    Publication date: September 2, 2021
    Inventors: Markus Beninger-Bina, Matteo Dainese, Ingo Dirnstorfer, Erich Griebl, Johannes Georg Laven, Anton Mauder, Hans-Joachim Schulze
  • Publication number: 20210257489
    Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.
    Type: Application
    Filed: May 4, 2021
    Publication date: August 19, 2021
    Inventors: Anton Mauder, Hans-Joachim Schulze, Matteo Dainese, Elmar Falck, Franz-Josef Niedernostheide, Manfred Pfaffenlehner
  • Publication number: 20210226015
    Abstract: A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Andreas Peter Meiser, Caspar Leendertz, Anton Mauder
  • Publication number: 20210226072
    Abstract: A method of processing a power diode includes: creating an anode region and a drift region in a semiconductor body; and forming, by a single ion implantation processing step, each of an anode contact zone and an anode damage zone in the anode region. Power diodes manufactured by the method are also described.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 22, 2021
    Inventors: Anton Mauder, Mario Barusic, Markus Bina, Matteo Dainese
  • Patent number: 11069626
    Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: July 20, 2021
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Oliver Hellmund, Peter Irsigler, Hanno Melzner, Stefan Miethaner, Sebastian Schmidt, Hans-Joachim Schulze
  • Publication number: 20210193646
    Abstract: A single chip power semiconductor device includes: first and second load terminals; a semiconductor body integrated in the single chip and coupled to the load terminals and configured to conduct a load current along a load current path between the load terminals; a control terminal and at least one control electrode electrically connected thereto, the at least one control electrode being electrically insulated from the semiconductor body and configured to control the load current based on a control voltage between the control terminal and the first load terminal; a protection structure integrated, separately from the load current path, in the single chip and including a series connection of pn junctions with first semiconductor regions of a first conductivity type and second semiconductor regions of a second conductivity type. The series connection of the pn-junctions is connected in forward bias between the control terminal and the first load terminal.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Inventors: Guang Zeng, Anton Mauder, Joachim Weyers
  • Publication number: 20210183746
    Abstract: A method of manufacturing a semiconductor device includes: forming a base portion of a bonding pad on a semiconductor portion, the base portion further comprising a base layer; forming a main surface of the bonding pad, the main surface comprising a bonding region; bonding a bond wire or clip to the bonding region; and forming a supplemental structure directly on the base portion. The supplemental structure laterally adjoins the bond wire or clip or is laterally spaced apart from the bond wire or clip. A volume-related specific heat capacity of the supplemental structure is higher than a volume-related specific heat capacity of the base layer.
    Type: Application
    Filed: February 4, 2021
    Publication date: June 17, 2021
    Inventors: Anton Mauder, Hans-Joachim Schulze
  • Patent number: 11018249
    Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: May 25, 2021
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Matteo Dainese, Elmar Falck, Franz-Josef Niedernostheide, Manfred Pfaffenlehner
  • Patent number: 11018051
    Abstract: A method includes: forming trenches extending from a surface along a vertical direction into a semiconductor body, facing trench sidewalls of two adjacent trenches laterally confining a mesa region of the semiconductor body along a first lateral direction; forming a body region in the mesa region, a surface of the body region in the mesa region at least partially forming the semiconductor body surface; forming a first insulation layer on the semiconductor body surface; subjecting the semiconductor body region to a tilted source implantation using at least one contact hole in the first insulation layer at least partially as a mask for forming a semiconductor source region in the mesa region. The tilted source implantation is tilted from the vertical direction by an angle of at least 10°. The semiconductor source region extends for no more than 80% of a width of the mesa region along the first lateral direction.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: May 25, 2021
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Markus Beninger-Bina, Matteo Dainese, Ingo Dirnstorfer, Erich Griebl, Johannes Georg Laven, Anton Mauder, Hans-Joachim Schulze
  • Patent number: 11011606
    Abstract: A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: May 18, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder
  • Publication number: 20210134960
    Abstract: A silicon carbide device includes a silicon carbide body having a hexagonal crystal lattice with a c-plane and with further main planes. The further main planes include a-planes and m-planes. A mean surface plane of the silicon carbide body is tilted to the c-plane by an off-axis angle. The silicon carbide body includes a columnar portion with column sidewalls. At least three of the column sidewalls are oriented along a respective one of the further main planes. A trench gate structure is in contact with the at least three of the column sidewalls.
    Type: Application
    Filed: October 27, 2020
    Publication date: May 6, 2021
    Inventors: Ralf Siemieniec, Rudolf Elpelt, Anton Mauder
  • Patent number: 10989742
    Abstract: A current sensor and a current sensing method are disclosed. The current sensor includes a sensor chip having a first chip surface, a second chip surface and at least one sensor element, and a housing having a first housing surface adjoining the second chip surface and a second housing surface spaced apart from the first housing surface and separated from the first housing surface by a spacer section of the housing. The second housing surface is configured to be mounted on a conductor and is electrically insulating.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: April 27, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Martin Gruber, Goran Keser
  • Patent number: 10991832
    Abstract: A power diode includes a semiconductor body coupled to an anode metallization and to a cathode metallization. The semiconductor body has a drift region of a first conductivity type and an anode region of a second conductivity type. The anode region includes: a contact zone arranged in contact with the anode metallization; a field stop zone arranged below the contact zone; and a body zone arranged below the field stop zone and above the drift region. An electrically activated dopant concentration of the anode region has a profile, along a vertical direction, according to which: a first maximum is present within the contact zone; a second maximum is present within the field stop zone; and the dopant concentration continuously decreases from the first maximum to a local minimum, and continuously increases from the local minimum to the second maximum.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: April 27, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Mario Barusic
  • Patent number: 10985248
    Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: April 20, 2021
    Assignee: Infineon Technologies AG
    Inventors: Caspar Leendertz, Romain Esteve, Anton Mauder, Andreas Meiser, Bernd Zippelius
  • Patent number: 10978596
    Abstract: A method of processing a power diode includes: creating an anode region and a drift region in a semiconductor body: and forming, by a single ion implantation processing step, each of an anode contact zone and an anode damage zone in the anode region. Power diodes manufactured by the method are also described.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: April 13, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Mario Barusic, Markus Bina, Matteo Dainese
  • Patent number: 10971620
    Abstract: A method includes partly removing a supporting layer arranged between a first semiconductor layer and a second semiconductor layer using an etching process to form at least one undercut between the first semiconductor layer and the second semiconductor layer, at least partly filling the at least one undercut with a first material having a higher thermal conductivity than the supporting layer, and forming a sensor device in or on the second semiconductor layer. Semiconductor arrangements and devices produced by the method are also described.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: April 6, 2021
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Joachim Weyers, Andreas Boehm, Anton Mauder, Patrick Schindler, Stefan Tegen, Armin Tilke, Uwe Wahl