Patents by Inventor Anton Pletersek

Anton Pletersek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10373037
    Abstract: An RFID transponder (T) suitable for communication with a reading device (RD) and adapted to be connected to a monitored unit (MU) is provided. The RFID transponder (T) comprises a comparing unit (CU) adapted to and arranged to receive a status signal from the monitored unit (MU) and configured to compare a value of the status signal to at least one predefined reference value and a state machine circuit (STM) connected to the comparing unit (CU) and configured to determine, based on a result of the comparison, whether the value of the status signal lies outside a range of operation defined by the at least one reference value. The state machine circuit (STM) is further configured to indicate the reading device (RD) that the value of the status signal lies outside the range of operation if the value of the status signal lies outside the range of operation.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: August 6, 2019
    Assignee: ams AG
    Inventors: Giancarlo Cutrignelli, Iztok Bratuz, Anton Pletersek, Alexander Hacker, Giuliano Manzi
  • Publication number: 20180129924
    Abstract: An RFID transponder (T) suitable for communication with a reading device (RD) and adapted to be connected to a monitored unit (MU) is provided. The RFID transponder (T) comprises a comparing unit (CU) adapted to and arranged to receive a status signal from the monitored unit (MU) and configured to compare a value of the status signal to at least one predefined reference value and a state machine circuit (STM) connected to the comparing unit (CU) and configured to determine, based on a result of the comparison, whether the value of the status signal lies outside a range of operation defined by the at least one reference value. The state machine circuit (STM) is further configured to indicate the reading device (RD) that the value of the status signal lies outside the range of operation if the value of the status signal lies outside the range of operation.
    Type: Application
    Filed: April 28, 2016
    Publication date: May 10, 2018
    Inventors: Giancarlo CUTRIGNELLI, Iztok BRATUZ, Anton PLETERSEK, Alexander HACKER, Giuliano MANZI
  • Patent number: 9940570
    Abstract: A radio frequency system has a first and a second antenna terminal, a radio frequency transceiver coupled to the antenna terminals, a rectifier connected to the antenna terminals at its input side and a voltage limiter. The voltage limiter comprises a first and a second input terminal connected to the antenna terminals, and a first and a second diode element connected between the first respectively the second input terminal and a bias terminal. A regulation transistor is connected between the bias terminal and the reference potential terminal. A voltage controller has a reference input for receiving a reference signal, a feedback input connected to the bias terminal and a control output for providing a control potential to a control terminal of the regulation transistor on the basis of the reference signal and a signal at the bias terminal.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: April 10, 2018
    Assignee: AMS AG
    Inventors: Anton Pletersek, Vinko Kunc
  • Patent number: 9558382
    Abstract: A microprogram for performing communication between an RFID smart tag and external digital sensors (EDS1, EDSK) is loaded in a buffer (Bu). A hard-wired dedicated processing unit (DPU) of the tag reads, decodes and executes said microprogram through the digital communication interface (DCI). The sensor data is stored at beginning locations of said buffer (Bu), wherefrom they are read by an RFID interrogator. The tag functionality in an application is settable with the RFID interrogator to an automatic data logger or RFID wireless sensor. The tag is adjustable to various types of digital sensors from various manufacturers. A hardwired dedicated processing unit makes it possible that the tag saves more energy, has smaller dimensions and is faster.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: January 31, 2017
    Assignee: AMS R&D ANALOGNI POLPREVODNIKI, D.O.O.
    Inventors: Kosta Kovacic, Vinko Kunc, Anton Pletersek
  • Publication number: 20160253587
    Abstract: A radio frequency system has a first and a second antenna terminal, a radio frequency transceiver coupled to the antenna terminals, a rectifier connected to the antenna terminals at its input side and a voltage limiter. The voltage limiter comprises a first and a second input terminal connected to the antenna terminals, and a first and a second diode element connected between the first respectively the second input terminal and a bias terminal. A regulation transistor is connected between the bias terminal and the reference potential terminal. A voltage controller has a reference input for receiving a reference signal, a feedback input connected to the bias terminal and a control output for providing a control potential to a control terminal of the regulation transistor on the basis of the reference signal and a signal at the bias terminal.
    Type: Application
    Filed: August 18, 2014
    Publication date: September 1, 2016
    Inventors: Anton PLETERSEK, Vinko KUNC
  • Patent number: 9239980
    Abstract: A controlled switching circuit (csc) comprises two controlled switches (cs1, cs2) fabricated with PINTOS transistors and connected between its output terminal as well as a battery (b) or a rectifier rectifying voltage induced in an antenna. Conditions of the battery voltage and the rectified voltage with a time delay are checked. Only when the battery voltage gets unacceptable and the value of rectified voltage exceeded a preset value tag circuits are supplied by the rectified voltage induced in an antenna. The invention provides for an automatic selection of a way of supplying an RFID tag in a way that it is stably supplied by a battery as far as still possible, but just according to the invention this is rendered possible for a longer time due to a very low voltage drop across a controlled switching circuit, and that a supply by a radio-frequency radiation field is selected only when the battery gets depleted.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: January 19, 2016
    Assignee: AMS R&D D.O.O.
    Inventors: Kosta Kovacic, Anton Pletersek, Andrej Vodopivec
  • Patent number: 9239981
    Abstract: A sensor-front-end processor (SFEP) predrives external sensors during a predominant part of time. In a low-consumption state it waits to receive a command (sc; st) to acquire and condition sensor signals. After receiving the command it drives the sensors, sets its own measuring range, acquires a coarse code (ccc, vcc) of a current and voltage sensor signal, conditions said signal and acquires a signal fine code (ccf, vcf). The command (sc) is generated in adjustable time intervals. The sensor-front-end processor acquires and conditions the signals from the sensors consecutively one after another. The command (st) is generated whenever a request (irq) to interrupt predriving one of the sensors was generated, i.e. whenever a level of the sensor signal or its relative change with respect to the previous measurement drops out from an interval for this sensor. The detected codes are stored in the memory.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: January 19, 2016
    Assignee: AMS R&D D.O.O.
    Inventors: Anton Pletersek, Kosta Kovacic, Andrej Vodopivec
  • Patent number: 8854189
    Abstract: Prior to logging of a process flags for locking at all addresses of a logging area of a tag are set to state 1 by means of an interrogator. A high limit (h) and a low limit (l) of an interval (l-h) of such values (v) of a physical parameter are determined, which are proper for preserving usability of a tagged article. Said values (v) acquired with a sensor and acquisition times related thereto are converted into less numerous data characterizing the process by observing said limits (h, l). Said data characterizing the process are logged in said logging area. Said process log cannot be modified in any way at a later stage. The invention also provides for an efficient observation of longer period of the process in the tagged article in order to inspect the usability thereof.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: October 7, 2014
    Assignee: AMS R&D D.O.O.
    Inventors: Kosta Kovacic, Anton Pletersek, Andrej Vodopivec, William Peyton Roberts, Oluf Alminde
  • Publication number: 20140247118
    Abstract: A microprogram for performing communication between an RFID smart tag and external digital sensors (EDS1, EDSK) is loaded in a buffer (Bu). A hard-wired dedicated processing unit (DPU) of the tag reads, decodes and executes said micro-program through the digital communication interface (DCI). The sensor data is stored at beginning locations of said buffer (Bu), wherefrom they are read by an RFID interrogator. The tag functionality in an application is settable with the RFID interrogator to an automatic data logger or RFID wireless sensor. The tag is adjustable to various types of digital sensors from various manufacturers. A hardwired dedicated processing unit makes it possible that the tag saves more energy, has smaller dimensions and is faster.
    Type: Application
    Filed: August 1, 2012
    Publication date: September 4, 2014
    Applicant: AMS R&D ANALOGNI POLPREVODNIKI, D.O.O.
    Inventors: Kosta Kovacic, Vinko Kunc, Anton Pletersek
  • Publication number: 20120206240
    Abstract: A sensor-front-end processor (SFEP) predrives external sensors during a predominant part of time. In a low-consumption state it waits to receive a command (sc; st) to acquire and condition sensor signals. After receiving the command it drives the sensors, sets its own measuring range, acquires a coarse code (ccc, vcc) of a current and voltage sensor signal, conditions said signal and acquires a signal fine code (ccf, vcf). The command (sc) is generated in adjustable time intervals. The sensor-front-end processor acquires and conditions the signals from the sensors consecutively one after another. The command (st) is generated whenever a request (irq) to interrupt predriving one of the sensors was generated, i.e. whenever a level of the sensor signal or its relative change with respect to the previous measurement drops out from an interval for this sensor. The detected codes are stored in the memory.
    Type: Application
    Filed: October 13, 2010
    Publication date: August 16, 2012
    Inventors: Anton Pletersek, Kosta Kovacic, Andrej Vodopivec
  • Publication number: 20120044055
    Abstract: Prior to logging of a process flags for locking at all addresses of a logging area of a tag are set to state 1 by means of an interrogator. A high limit (h) and a low limit (l) of an interval (l-h) of such values (v) of a physical parameter are determined, which are proper for preserving usability of a tagged article. Said values (v) acquired with a sensor and acquisition times related thereto are converted into less numerous data characterizing the process by observing said limits (h, l). Said data characterizing the process are logged in said logging area. Said process log cannot be modified in any way at a later stage. The invention also provides for an efficient observation of longer period of the process in the tagged article in order to inspect the usability thereof.
    Type: Application
    Filed: January 6, 2010
    Publication date: February 23, 2012
    Inventors: Kosta Kovacic, Anton Pletersek, Andrej Vodopivec, William Peyton Roberts, Oluf Alminde
  • Publication number: 20110241842
    Abstract: A controlled switching circuit (csc) comprises two controlled switches (cs1, cs2) fabricated with PINTOS transistors and connected between its output terminal as well as a battery (b) or a rectifier rectifying voltage induced in an antenna. Conditions of the battery voltage and the rectified voltage with a time delay are checked. Only when the battery voltage gets unacceptable and the value of rectified voltage exceeded a preset value tag circuits are supplied by the rectified voltage induced in an antenna. The invention provides for an automatic selection of a way of supplying an RFID tag in a way that it is stably supplied by a battery as far as still possible, but just according to the invention this is rendered possible for a longer time due to a very low voltage drop across a controlled switching circuit, and that a supply by a radio-frequency radiation field is selected only when the battery gets depleted.
    Type: Application
    Filed: December 16, 2009
    Publication date: October 6, 2011
    Inventors: Kosta Kovacic, Anton Pletersek, Andrej Vodopivec
  • Patent number: 7777661
    Abstract: Intermediate digital signals Fi(?), Gi(?), i=1, . . . I, are generated, which result from a comparison of reference potentials of the first input analogue signal at a shifted value of its observed argument and with a suitably reduced amplitude to the potential, which is inverse to said potential, of the third input analogue signal at the same shifted value of the observed argument and with the amplitude reduced in said way, the shifted argument values being uniformly distributed within the first half-period. A value U of the voltage is measured at any value of the observed argument as at that time the highest one of the voltages at terminals with said reference potentials. An actual peak amplitude A of the input analogue signals is determined as A=kI,mU where the factor kI,m is a quotient of the peak amplitude of said input analogue signals and of the mean value of the voltage waveform envelope of the reference potentials pertaining to said peak amplitude.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: August 17, 2010
    Assignee: IDS d.o.o.
    Inventors: Anton Pletersek, Roman Benkovic
  • Publication number: 20100019942
    Abstract: Intermediate digital signals Fi(?), Gi(?), i=1, . . . I, are generated, which result from a comparison of reference potentials of the first input analogue signal at a shifted value of its observed argument and with a suitably reduced amplitude to the potential, which is inverse to said potential, of the third input analogue signal at the same shifted value of the observed argument and with the amplitude reduced in said way, the shifted argument values being uniformly distributed within the first half-period. A value U of the voltage is measured at any value of the observed argument as at that time the highest one of the voltages at terminals with said reference potentials. An actual peak amplitude A of the input analogue signals is determined as A=kI,mU where the factor kI,m is a quotient of the peak amplitude of said input analogue signals and of the mean value of the voltage waveform envelope of the reference potentials pertaining to said peak amplitude.
    Type: Application
    Filed: March 28, 2007
    Publication date: January 28, 2010
    Inventors: Anton Pletersek, Roman Benkovic
  • Patent number: 7282901
    Abstract: A circuit of the invention comprises a low voltage PTAT source. Current generators (t1, t2) are controlled so that their output currents I1 and I2, respectively, have temperature properties of the quotient VPTAT/R. The current I1 is conducted to a first terminal (X) on a first connection of a composition of series connected resistors (Ra, Rb), a second connection thereof being grounded. A transistor (T) is diodelike forward connected between the first terminal (X) and the ground. The current I2 is conducted to a second terminal (Y), preferably being at the same time a common connection (Z) of the resistors (Ra, Rb). Reference voltage Vr is tapped from the connection (Z). Said resistors (Ra, Rb) are manufactured in the n?-well technology in the same way as the resistor (R), with the resistance of which the mentioned quotient is generated.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: October 16, 2007
    Inventor: Anton Pletersek
  • Publication number: 20060176041
    Abstract: A circuit of the invention comprises a low voltage PTAT source. Current generators (t1, t2) are controlled so that their output currents I1 and I2, respectively, have temperature properties of the quotient VPTAT/R. The current I1 is conducted to a first terminal (X) on a first connection of a composition of series connected resistors (Ra, Rb), a second connection thereof being grounded. A transistor (T) is diodelike forward connected between the first terminal (X) and the ground. The current I2 is conducted to a second terminal (Y), preferably being at the same time a common connection (Z) of the resistors (Ra, Rb). Reference voltage Vr is tapped from the connection (Z). Said resistors (Ra, Rb) are manufactured in the n?-well technology in the same way as the resistor (R), with the resistance of which the mentioned quotient is generated.
    Type: Application
    Filed: July 9, 2003
    Publication date: August 10, 2006
    Inventor: Anton Pletersek