Abstract: A method includes: generating, based on a hash function using at least one input including first data, a first digest; storing the first data in a memory; reading the first data from the memory; generating, based on the read data, a second digest; comparing the first digest and the second digest; and determining, based on comparing the first digest and the second digest, whether the read data is corrupted.

Abstract: An example memory device with an improved sensing structure including a memory array comprising a plurality of sub-arrays of memory cells and structured in memory blocks, sense amplifiers coupled to the memory cells, and modified JTAG cells coupled in parallel to the outputs of the sense amplifiers and serially interconnected in a scan-chain structure integrating a JTAG structure and the sense amplifiers. In the example memory device, the scan-chain structures associated to each sub array are interconnected to form a unique chain as a boundary scan register. Further, in the example memory device, the boundary scan register is a testing structure to test interconnections of the sense amplifiers.

Abstract: The present disclosure relates to method for checking the reading phase of a non-volatile memory device including at least an array of memory cells and with associated decoding and sensing circuitry and a memory controller, the method comprises: storing in a dummy row associated to said memory block at least internal block variables and a known pattern; performing a reading of said dummy row; I comparing a result of the reading with the known pattern; trimming the parameters of the reading and/or swapping the used memory block based on the result of the comparing.

Abstract: The present disclosure relates to a memory architecture comprising a plurality of subarrays of memory cells, a plurality of sense amplifiers connected to the subarrays, a plurality of original pads, at least one redundant pad, multiple data lines, and a redundant register connected to the plurality of original pads, to the plurality of redundant pads and to the data lines. The redundant register implementing an interconnection redundancy and connecting one of the redundant pads to the data lines when an addressed original pad is found defective. The disclosure also relates to a System-on-Chip (SoC) component comprising a memory architecture, and an interconnection redundancy managing block included into the memory architecture. A related memory component and related methods for managing interconnection redundancy of the memory architecture and/or the SoC are also disclosed.

Abstract: Disclosed are techniques for remotely managing computing devices using blockchain and DICE-RIoT. In one embodiment, a method is disclosed comprising scanning a network to obtain a list of devices on the network; classifying the devices as either controlled or uncontrolled devices; establishing a secure channel with the controlled devices; issuing one or more control commands to the controlled devices over the secure channel, the one or more control commands included within a signed message, the signed message signed using a private key of the sender and verified using a public key of the receiver, the private key and public key generated during the establishing of the secure channel; receiving a response to the control commands; and logging the control commands and the response in a blockchain.

Abstract: According to one aspect, a system-on-a-chip is proposed which includes a memory storage, a computation circuit, a comparison circuit, and a validation circuit. The memory storage is configured to store an external software module. The computation circuit is configured to compute several modified software modules from the external software module and compute check values by iteration until obtaining a final check value. Each check value is computed at least from a given modified software module and a check value previously computed, starting with a predefined initial check value. The comparison circuit is configured to compare the final check value to an expected value stored in the system-on-a-chip. The validation circuit is configured to validate the external software module when the final check value is equal to the expected value.

Abstract: Disclosed are techniques for managing a platoon of autonomous vehicles. In one embodiment, a method is disclosed comprising establishing a network connection between a plurality of autonomous vehicles, the plurality of autonomous vehicles operating as a platoon; receiving a request from a first autonomous vehicle to deviate from the platoon, the request comprising a digitally signed message from the first autonomous vehicle; assigning the first autonomous vehicle as a second master autonomous vehicle; permanently recording the assignment in a blockchain data structure; instantiating a new platoon path using the first autonomous vehicle as a head of the new platoon path; and disconnecting one or more autonomous vehicles associated with the new platoon path upon determining that the new platoon path is stable, the disconnecting causing the second master autonomous vehicle to manage the one or more autonomous vehicles using a second blockchain stored on the second master autonomous vehicle.

Abstract: The present disclosure relates to method for checking the reading phase of a non-volatile memory device including at least an array of memory cells and with associated decoding and sensing circuitry and a memory controller, the method comprises: storing in a dummy row associated to said memory block at least internal block variables and a known pattern; performing a reading of said dummy row; comparing a result of the reading with the known pattern; trimming the parameters of the reading and/or swapping the used memory block based on the result of the comparing.

Abstract: The present disclosure includes secure device communication. An embodiment includes a processing resource, a memory, and a network management device communication component configured to, send public information to a network attached device communication component, and receive a network attached device public key and an encrypted random string value from the network attached device communication component. The network attached device public key and the random string value are received independent of a type of the network attached device communication component due to the public information. The network management communication component is further configured to decrypt the random string value from the network attached device communication component and send, to the network attached device communication component, a message and a signature to authenticate independent of the type of the network attached device communication component due to the public information.

Abstract: Method of operating a radio communication system during a stand-by time interval in a stand-by state. The method comprises: applying clock division processing to a reference clock signal and producing a divided clock signal; applying PLL processing to the divided clock signal producing a PLL clock signal; receiving at least one input signal; when the input signal has a first logic value, interrupting applying PLL processing to the divided clock signal and enabling counting clock signal edges of the divided clock signal; when said counting clock signal edges reaches a first target count value, restarting applying PLL processing; continuing counting clock signal edges until reaching a second target count value; when said counting reaches the second target count value, issuing and sampling an end-count signal based on the PLL clock signal, producing a timing clock signal as a result and providing the timing clock signal to a user circuit.

Abstract: Disclosed are techniques for remotely controlling autonomous vehicles. In one embodiment, a method is disclosed comprising receiving a message from a first autonomous vehicle, the message including a signed body portion and a triple including components selected from the group consisting of a public identifier of the first autonomous vehicle, a public key of the first autonomous vehicle, and a certificate of the first autonomous vehicle; authenticating the message by verifying the certificate of the first autonomous vehicle; logging the message into a blockchain storage structure, the blockchain storage structure storing a plurality of blocks, each blocking including the signed body portion; and executing one or more orders included within the signed body portion.

Abstract: Techniques for calculating a hash value of a single secure array of memory blocks in a sequential set of dice. The array can be defined by a set of address-size pairs. Each pair provides a pointer by including an address of a memory block and a size of the block. The hash value can be calculated by: for each die that is not the last die, partially applying a hash function, without final padding, to the memory blocks of the secure array in the die to generate a partial digest. And, for the last die, fully applying the hash function, with the final padding, to the memory blocks of the secure array in the last die to generate the hash value of the secure array, which can include adding an accumulation of partial digests to data from the last die as a basis for the generation of the hash value.

Abstract: The present disclosure includes apparatuses, methods, and systems for using memory as a block in a block chain. An embodiment includes a memory, and circuitry configured to generate a block in a block chain for validating data stored in the memory, wherein the block includes a cryptographic hash of a previous block in the block chain and a cryptographic hash of the data stored in the memory, and the block has a digital signature associated therewith that indicates the block is included in the block chain.

Abstract: In an embodiment a system on chip includes at least one master device, at least one slave device, a connection interface configured to route signals between the at least one master device and the at least one slave device, the connection interface configured to operate according to configuration parameters, and a configuration bus connected to the connection interface, wherein the configuration bus is configured to deliver new configuration parameters to the connection interface so as to adapt operation of the connection interface.

Abstract: A method includes providing a reference clock signal having a reference period, providing a sampling clock signal having a sampling clock period shorter than the reference period of the reference clock signal, measuring the first subperiod as a first ratio of the first subperiod to the period of the sampling clock signal, measuring the second subperiod as a second ratio of the second subperiod to the period of the sampling clock signal, detecting a starting edge of a clock signal having a clock period greater than the reference period, producing a reconstructed reference signal based on the first ratio, the second ratio, and the detected starting edge, comparing the clock period of the clock signal with a period of the reconstructed reference signal to obtain a differential signal indicating a difference therebetween, and providing the differential signal to user circuitry for calibrating the clock signal.

Abstract: A circuit implemented as a System-on-Chip (SOC) circuit comprising a microcontroller configured to drive one or more hard macros via a respective communication interface and a shielded bus. The microcontroller configured to transmit over the shielded bus random numbers to the hard macro. The microcontroller and the hard macro configured to use these random numbers as cryptographic shared secret for authentication. The microcontroller configured to drive via the communication interface the hard macros authenticated via the random numbers.

Abstract: An apparatus can have a processor configured to determine a length of time that a vehicle is in a region and to determine whether the vehicle needs to be configured for the region based on the determined length of time.

Abstract: The present disclosure includes apparatuses, methods, and systems for secure communication between an intermediary device and a network. An example apparatus includes a memory, and circuitry. The circuitry is configured to determine, in response to receipt of a request for information corresponding to a particular category, an identifier associated with the particular category. The circuitry is further configured to provide, along with a signature, the determined identifier to a network device, wherein the requested information are received in response to the signature being verified by network device.

Abstract: Disclosed are techniques for remotely managing computing devices using blockchain and DICE-RIoT. In one embodiment, a method is disclosed comprising scanning a network to obtain a list of devices on the network; classifying the devices as either controlled, uncontrolled or restricted devices; establishing a secure channel with the controlled devices; issuing one or more control commands to the controlled devices over the secure channel, the one or more control commands included within a signed message, the signed message signed using a private key of the sender and verified using a public key of the receiver, the private key and public key generated during the establishing of the secure channel; receiving a response to the control commands; and logging the control commands and the response in a blockchain.

Abstract: A system on chip, SOC circuit comprising a plurality of peripherals configured to be clocked with respective clock signals, wherein the circuit comprises a clock controller configured to produce said respective clock signals via respective clock divide factors, the clock controller comprising a plurality of storage locations having stored therein respective sets of clock divide factors, wherein the clock controller comprises clock divide factor selection circuitry configured to select an operating set of clock divide factors out of said respective sets of clock divide factors stored in said plurality of storage locations and wherein the clock controller is configured to apply to the plurality of peripherals respective clock signals produced via the clock divide factors in the operating set of clock divide factors selected out of said respective sets of clock divide factors stored in said plurality of storage locations.