Patents by Inventor Antonio F. Mondragon-Torres

Antonio F. Mondragon-Torres has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8135057
    Abstract: A reconfigurable chip level equalizer having circuitry that restores signal orthogonality and eliminates channel interference for a wireless transmitted signal. In at least some embodiments, the reconfigurable chip level equalizer comprises two or more adaptive equalizers, a plurality of operational blocks that interconnect the two or more adaptive equalizers, and a control mechanism that configures the two or more adaptive equalizers and operational blocks according to different signal delay profiles.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: March 13, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Antonio F. Mondragon-Torres, Steven P. Pekarich, Timothy M. Schmidl, Gibong Jeong, Aris Papasakellariou, Anand G. Dabak, Eko N. Onggosanusi
  • Patent number: 7561618
    Abstract: A system comprising a plurality of adaptive equalizers adapted to couple to a plurality of receive antennas, each of the antennas capable of receiving a multipath delay profile estimate (MDPE), control logic interconnecting at least some of the adaptive equalizers, and a control mechanism that, according to different MDPEs, configures at least some of the adaptive equalizers and control logic.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: July 14, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Antonio F. Mondragon-Torres, Steven P. Pekarich, Timothy M. Schmidl, Aris Papasakellariou, Anand G. Dabak, Eko N. Onggosanusi, Manish Goel
  • Patent number: 6996765
    Abstract: This invention describes implementation approaches for sliding window turbo decoders. Sliding windows are used for both the beta and alpha state metric calculations. Initialization of the beta/alpha prolog sections with data from a previous iteration is employed in conjunction with a reduced length prolog section. For subsequent sliding windows the trellis values of the prolog sections are dynamically initialized based upon data derived from the signal to noise ratio of the calculated extrinsic data or the difference between the two most probable trellis states.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Tod D. Wolf, Antonio F. Mondragon-Torres, Alan Gatherer
  • Patent number: 6775801
    Abstract: This invention presents a unique implementation of the extrinsic block the turbo decoder that solves the problem of generation and use of precision extension and normalization in the alpha and beta metrics blocks. Both alpha metric inputs and beta metric inputs are processed via a circle boundary detector indicating the quadrant of the two's complement input and a precision extend block receiving an input and a corresponding circle boundary input. An extrinsics block includes a two's complement adder of the precision extended alpha and beta metrics inputs. The proposed solution obviates the need for normalization in the alpha and beta metric blocks.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: August 10, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Tod D. Wolf, Antonio F. Mondragon-Torres
  • Publication number: 20040127164
    Abstract: A reconfigurable chip level equalizer having circuitry that restores signal orthogonality and eliminates channel interference for a wireless transmitted signal. In at least some embodiments, the reconfigurable chip level equalizer comprises two or more adaptive equalizers, a plurality of operational blocks that interconnect the two or more adaptive equalizers, and a control mechanism that configures the two or more adaptive equalizers and operational blocks according to different signal delay profiles.
    Type: Application
    Filed: November 3, 2003
    Publication date: July 1, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Antonio F. Mondragon-Torres, Steven P. Pekarich, Timothy M. Schmidl, Gibong Jeong, Aris Papasakellariou, Anand G. Dabak, Eko N. Onggosanusi
  • Publication number: 20030097630
    Abstract: This invention describes implementation approaches for sliding window turbo decoders. Sliding windows are used for both the beta and alpha state metric calculations. Initialization of the beta/alpha prolog sections with data from a previous iteration is employed in conjunction with a reduced length prolog section. For subsequent sliding windows the trellis values of the prolog sections are dynamically initialized based upon data derived from the signal to noise ratio of the calculated extrinsic data or the difference between the two most probable trellis states.
    Type: Application
    Filed: September 27, 2002
    Publication date: May 22, 2003
    Inventors: Tod D. Wolf, Antonio F. Mondragon-Torres, Alan Gatherer