Abstract: The invention generally relates to switch mode power converters (SMPCs).

Abstract: A power converter includes a transformer coupled to transfer power from a primary side of the power converter to a secondary side of the power converter. The transformer includes a primary side winding coupled to receive power from a primary side input of the power converter and a secondary side winding coupled to provide power to a secondary side output of the power converter. A power switch is coupled to the transformer, and a power switch controller is coupled to control the switching of the power switch between an ON state and an OFF state. A communication circuit is coupled to communicate data between the primary side of the power converter and the secondary side of the power converter.

Abstract: A controller for a power converter includes a driver circuit that generates a control signal to switch a power switch in response to an output, and a control circuit that controls the switching of the power switch. The control circuit includes a storage time reference circuit generates a storage time reference signal responsive to an input. A first comparator generates a collector off signal in response to a comparison of a switch current sense signal and a collector off reference signal. A storage time regulator circuit generates a base off reference signal in response to the storage time reference signal and the collector off signal. A second comparator generates a base off signal in response to a second comparison of the switch current sense signal and the base off reference signal. The driver circuit is coupled to discontinue and start charging a base terminal of the BJT power switch.

Abstract: A boost-bypass converter includes a boost inductor coupled between an input and an output of the boost-bypass converter. A bypass diode is coupled between the input the output of the boost-bypass converter. A boost switching element is coupled to the boost inductor, and is coupled to be activated during a first interval in each line half cycle of an input voltage to boost an output voltage at the output of the boost-bypass converter. The boost switching element is coupled to be deactivated during a second interval in said each line half cycle such that the output voltage drops towards the input voltage. The output voltage is coupled to follow the input voltage during a third interval in said each line half cycle of the input voltage. Energy is transferred between the input and the output of the boost-bypass converter through the bypass diode during the third interval.

Abstract: A power converter controller includes a storage time reference circuit to generate a storage time reference signal in response to an input voltage signal. A first comparator generates a collector off signal in response to a current sense signal of a BJT and a collector off reference threshold signal. A storage time regulator circuit generates a base off reference threshold signal in response to the storage time reference signal and the collector off signal. A second comparator generates a base off signal in response to the current sense signal and a base off reference threshold signal. A driver circuit controls switching of the BJT in response to an output voltage signal, discontinues charging a base terminal of the BJT in response to the base off signal, and starts discharging the base terminal of the BJT in response to the collector off signal during a switching cycle of the BJT.

Abstract: A power converter controller includes a storage time reference circuit to generate a storage time reference signal in response to an input voltage signal. A first comparator generates a collector off signal in response to a current sense signal of a BJT and a collector off reference threshold signal. A storage time regulator circuit generates a base off reference threshold signal in response to the storage time reference signal and the collector off signal. A second comparator generates a base off signal in response to the current sense signal and a base off reference threshold signal. A driver circuit controls switching of the BJT in response to an output voltage signal, discontinues charging a base terminal of the BJT in response to the base off signal, and starts discharging the base terminal of the BJT in response to the collector off signal during a switching cycle of the BJT.

Abstract: A switched mode power converter (SMPC) has an isolation transformer for power transfer and a communication circuit for data communication between the primary side and the secondary side. The SMPC includes a primary switch controller configured to transfer power from a primary side to a secondary side by controlling a primary switch ON for an ON time period and then controlling the primary switch OFF for an OFF time period. The primary switch controller controls the ON time period of the subsequent power transfer cycle to start a time delay after the end of the OFF time period of the previous power transfer cycle. The communication circuit comprises a magnetically coupled transmission winding and reception winding, a communication switch, and a communication controller to control the communication switch to allow charge flow through the transmission winding during at least part of the time delay for data communication.

Abstract: This invention generally relates to methods for transferring information between primary and secondary sides of a switched mode power converter (SMPC), and more particularly a flyback or forward converter operating in discontinuous current mode.

Abstract: This invention generally relates to solid state lighting control, and more particularly to a dimmer interface circuit and a method for reducing ringing on a drive signal to a solid state lighting device.

Abstract: The invention generally relates to switch mode power converters (SMPCs).

Abstract: A record carrier includes a pattern of substantially parallel tracks for storing data in the form of marks, in which the data is encoded by a channel code. A watermark is provided by controlling the parameter of the channel code so as to introduce a predetermined run length distribution in the marks on the record carrier. Brightness differences are caused by introducing this run length distribution.

Abstract: A method and device for measuring a switched current (IH) comprises: sensing the switched current (IH) with an AC current transformer to obtain an intermediate measuring signal (VHM); receiving a timing signal indicating on and off periods of the switched current (IH); during an off period, generating an auxiliary signal such that the sum of the intermediate measuring signal and the auxiliary signal is equal to zero; and during an on period, adding the intermediate measuring signal and said the auxiliary signal and providing the sum signal as the output measuring signal, the output measuring signal reflecting an actual value of the AC part and the DC part of the switched current (IH).

Abstract: A record carrier includes a pattern of substantially parallel tracks for storing data in the form of marks, in which the data is encoded by a channel code. A watermark is provided by controlling the parameter of the channel code so as to introduce a predetermined run length distribution in the marks on the record carrier. Brightness differences are caused by introducing this run length distribution.

Abstract: The invention relates to a record carrier (1) comprising a pattern of substantially parallel tracks (2) for storing data in the form of marks, in which the data is encoded by means of a channel code. The record carrier further includes a watermark (3) which is provided by controlling the parameter of the channel code so as to introduce a predetermined run length distribution in the marks on the record carrier. Brightness differences are caused by introducing this run length distribution. The invention also relates to a device for reading a record carrier, a method of providing a watermark on the record carrier, and a device for providing a watermark on a record carrier.