Patents by Inventor Ara Bicakci

Ara Bicakci has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200187127
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may include a memory and at least one processor coupled to the memory. The at least one processor may be configured to determine a retransmission rate associated with retransmission of one or more packets by the communications device. The at least one processor may be configured to determine a measurement associated with antenna gain of at least one antenna of the apparatus. The at least one processor may be configured to adjust a transmission power of the apparatus based on the retransmission rate and based on the measurement.
    Type: Application
    Filed: August 12, 2019
    Publication date: June 11, 2020
    Inventors: Mahbod MOFIDI, Arild KOLSRUD, Yoshiro FUKUOKA, Ara BICAKCI, Michael KOHLMANN, Steven JONES
  • Patent number: 10615749
    Abstract: A modulator may include a controller configured to receive in-phase (I) baseband signals and quadrature-phase (Q) baseband signals. The controller may be configured to select a section of a region defined by a number of local oscillator (LO) phases. The controller may be configured to output multiple control signals and a pair of phase selection signals. The modulator may further include multiple output stages. Each output stage may be coupled to the controller to receive a pair of the control signals, the pair of phase selection signals, and multiple offset LO signals. Each of the output stages may include a unit element.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: April 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Efthymios Philip Papageorgiou, Ara Bicakci, Sean Joel Lyn, Yue Lu, Ngar Loong Alan Chan
  • Publication number: 20200007098
    Abstract: An apparatus is disclosed for dual-mode amplification by varying a load impedance. In an example aspect, the apparatus includes a low-noise amplifier, a first component, a second component, and a switch. The first component has a first input impedance. The second component is coupled between the low-noise amplifier and the first component. The second component has a second input impedance that is greater than the first input impedance. The switch is coupled in parallel with the second component between the low-noise amplifier and the first component. The switch is configured to selectively be in an open state to engage the second component or a closed state to bypass the second component.
    Type: Application
    Filed: August 28, 2018
    Publication date: January 2, 2020
    Inventors: Hung-Min Cheng, Ara Bicakci, Haitao Gan, Shen Wang, Mounir Bohsali, Hedieh Elyasi, Beomsup Kim
  • Publication number: 20190393838
    Abstract: A modulator may include a controller configured to receive in-phase (I) baseband signals and quadrature-phase (Q) baseband signals. The controller may be configured to select a section of a region defined by a number of local oscillator (LO) phases. The controller may be configured to output multiple control signals and a pair of phase selection signals. The modulator may further include multiple output stages. Each output stage may be coupled to the controller to receive a pair of the control signals, the pair of phase selection signals, and multiple offset LO signals. Each of the output stages may include a unit element.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Efthymios Philip PAPAGEORGIOU, Ara BICAKCI, Sean Joel LYN, Yue LU, Ngar Loong Alan CHAN
  • Patent number: 10054444
    Abstract: The subject matter disclosed herein relates to a system and method for receiving a plurality of signals generated by a plurality of sensors adapted to detect physical movement of a mobile device with respect to a plurality of coordinate axes. A time at which at least one of the received signals is digitized is delayed to provide an output of digitized versions of the received plurality of signals synchronized with respect to a common point in time.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 21, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Joseph Czompo, Ara Bicakci
  • Patent number: 10050586
    Abstract: Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (?gm) compared to conventional VCOs. This ?gm degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: August 14, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Thinh Cat Nguyen, Jeongsik Yang, Roger Thomas Brockenbrough, Ara Bicakci, Anup Savla, Shen Wang
  • Publication number: 20170163214
    Abstract: Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (?gm) compared to conventional VCOs. This ?gm degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Inventors: Thinh Cat NGUYEN, Jeongsik YANG, Roger Thomas BROCKENBROUGH, Ara BICAKCI, Anup SAVLA, Shen WANG
  • Patent number: 9634607
    Abstract: Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (?gm) compared to conventional VCOs. This ?gm degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: April 25, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventors: Thinh Cat Nguyen, Jeongsik Yang, Roger Thomas Brockenbrough, Ara Bicakci, Anup Savla, Shen Wang
  • Publication number: 20170063383
    Abstract: This disclosure provides a device and method for synchronizing local oscillator (LO) chains. The method can include sampling first I-data and first Q-data to generate first sampled I-data and first sampled Q-data based on a sampling clock signal. The method can also include calibrating the sampling clock signal based on the first sampled I-data and the first sampled Q-data to generate a first calibrated sampling clock signal, the first calibrated sampling clock signal indicating an optimal sample position to sample the first I-data and the first Q-data. The method can also include synchronizing a phase of the first LO chain and a second LO chain based on the first calibrated sampling clock signal.
    Type: Application
    Filed: August 27, 2015
    Publication date: March 2, 2017
    Inventors: Jeongsik Yang, Yashar Rajavi, Keplin Victor Johansen, Ara Bicakci
  • Publication number: 20160373116
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for compensating, or at least adjusting, for capacitor leakage. One example method generally includes determining a leakage voltage corresponding to a leakage current of a capacitor in a filter for a phase-locked loop (PLL), wherein the determining comprises closing a set of switches for discontinuous sampling of the leakage voltage; based on the sampled leakage voltage, generating a sourced current approximately equal to the leakage current; and injecting the sourced current into the capacitor.
    Type: Application
    Filed: September 6, 2016
    Publication date: December 22, 2016
    Inventors: Mohammad Bagher VAHID FAR, Ara BICAKCI, Alireza KHALILI, Ashkan BORNA, Thinh Cat NGUYEN
  • Patent number: 9455723
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for compensating, or at least adjusting, for capacitor leakage. One example method generally includes determining a leakage voltage corresponding to a leakage current of a capacitor in a filter for a phase-locked loop (PLL), wherein the determining comprises closing a set of switches for discontinuous sampling of the leakage voltage; based on the sampled leakage voltage, generating a sourced current approximately equal to the leakage current; and injecting the sourced current into the capacitor.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: September 27, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Mohammad Bagher Vahid Far, Ara Bicakci, Alireza Khalili, Ashkan Borna, Thinh Cat Nguyen
  • Patent number: 9438249
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for temperature-dependent adjustment of a resonant circuit, such as that found in a voltage-controlled oscillator (VCO). Such adjustment may be performed in an effort to compensate for the frequency drift of the resonant circuit due to temperature changes. One example adjustment circuit for temperature-dependent adjustment of a resonant circuit generally includes at least one varactor and two sets of semiconductor devices configured to apply, across the at least one varactor, a differential adjustment voltage based on an ambient temperature of the semiconductor devices to adjust a capacitance of the at least one varactor, wherein each device in the sets of semiconductor devices has a temperature-dependent junction and wherein the two sets of semiconductor devices are configured such that voltage changes of the temperature-dependent junctions in the two sets of semiconductor devices are added in the differential adjustment voltage.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: September 6, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Thinh Cat Nguyen, Jeongsik Yang, Ara Bicakci, Shen Wang, Anup Savla
  • Publication number: 20160254817
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for compensating, or at least adjusting, for capacitor leakage. One example method generally includes determining a leakage voltage corresponding to a leakage current of a capacitor in a filter for a phase-locked loop (PLL), wherein the determining comprises closing a set of switches for discontinuous sampling of the leakage voltage; based on the sampled leakage voltage, generating a sourced current approximately equal to the leakage current; and injecting the sourced current into the capacitor.
    Type: Application
    Filed: June 18, 2015
    Publication date: September 1, 2016
    Inventors: Mohammad Bagher VAHID FAR, Ara BICAKCI, Alireza KHALILI, Ashkan BORNA, Thinh Cat NGUYEN
  • Publication number: 20160006422
    Abstract: A dynamic latch is disclosed that may reduce power consumption in frequency dividers while widening their frequency operation ranges. The dynamic latch includes a sense component to detect an input voltage in response to a first state of a mode select signal, and to generate an output voltage based, at least in part, on the input voltage; a hold component to retain the output voltage in response to a second state of the mode select signal; and a first transistor, coupled between the sense component and ground potential, including a gate responsive to the mode select signal.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Thinh Cat Nguyen, Jeongsik Yang, Shen Wang, Ara Bicakci, Anup Savla, Babak Vakili-Amini
  • Publication number: 20150318860
    Abstract: Aspects of circuits and methods for generating an oscillating signal are disclosed. The circuit includes a phase detector configured to output first and second signals responsive to a phase difference between two input signals. The phase detector is further configured to disable the first signal when outputting the second signal and to disable the second signal when outputting the first signal. The circuit further includes a voltage controlled oscillator (VCO) configured to generate an oscillating signal having a tunable frequency responsive to the first and second signals.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 5, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Shen WANG, Jeongsik YANG, Thinh Cat NGUYEN, Ara BICAKCI, Anup SAVLA
  • Publication number: 20150263671
    Abstract: Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (?gm) compared to conventional VCOs. This ?gm degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 17, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Thinh Cat NGUYEN, Jeongsik YANG, Roger Thomas BROCKENBROUGH, Ara BICAKCI, Anup SAVLA, Shen WANG
  • Patent number: 8502597
    Abstract: Techniques for low-pass filtering with high quality factor (Q). In an exemplary embodiment, an input current is coupled to the drain of a first transistor. The drain and the gate of the first transistor are coupled together by a resistor R1, and the drain is coupled to a reference voltage by a first capacitor C1. The gate is coupled to a reference voltage by a second capacitor C2. The gate is further coupled to the gate of a second transistor, and an output current is coupled to the drain of the second transistor. In another exemplary embodiment, further passive elements may be coupled to generate an odd-order low-pass transfer characteristic. Multiple filters may be cascaded in series to synthesize a filter having arbitrary order.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: August 6, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Arezou Khatibi, Ara Bicakci, Rainer Gaethke
  • Publication number: 20110090824
    Abstract: Techniques for low-pass filtering with high quality factor (Q). In an exemplary embodiment, an input current is coupled to the drain of a first transistor. The drain and the gate of the first transistor are coupled together by a resistor R1, and the drain is coupled to a reference voltage by a first capacitor C1. The gate is coupled to a reference voltage by a second capacitor C2. The gate is further coupled to the gate of a second transistor, and an output current is coupled to the drain of the second transistor. In another exemplary embodiment, further passive elements may be coupled to generate an odd-order low-pass transfer characteristic. Multiple filters may be cascaded in series to synthesize a filter having arbitrary order.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 21, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Arezou Khatibi, Ara Bicakci, Rainer Gaethke
  • Publication number: 20100305899
    Abstract: The subject matter disclosed herein relates to a system and method for receiving a plurality of signals generated by a plurality of sensors adapted to detect physical movement of a mobile device with respect to a plurality of coordinate axes. A time at which at least one of the received signals is digitized is delayed to provide an output of digitized versions of the received plurality of signals synchronized with respect to a common point in time.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 2, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Joseph Czompo, Ara Bicakci
  • Patent number: RE41399
    Abstract: A technique to stabilize subcarrier generation in a line-locked digital video system, caused by simultaneous locking of the genlock device causing continuous changing of a shared clock signal, by calculating a time shift occurring in an output waveform, converting the time shift into an equivalent phase shift and sending a corresponding phase correction number to a waveform generator block to correct the time shift, and thus stabilize subcarrier generation.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: June 29, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Ara Bicakci