Patents by Inventor Aravinda Prasad

Aravinda Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12117908
    Abstract: Systems, apparatuses and methods may provide for technology that associates a unique identifier with an application, creates an entry in a metadata table, wherein the metadata table is at a fixed location in persistent system memory, populates the entry with the unique identifier, a user identifier, and a pointer to a root of a page table tree, and recovers in-use data pages after a system crash. In one example, the in-use data pages are recovered from the persistent system memory based on the metadata table and include one or more of application heap information or application stack information.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 15, 2024
    Assignee: Intel Corporation
    Inventors: Aravinda Prasad, Sreenivas Subramoney
  • Publication number: 20240143379
    Abstract: It is provided an apparatus for enabling sequential prefetching inside a host, the apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions. The machine-readable instructions comprise instructions to identify a first memory access pattern of an application in a guest virtual address space inside a virtual machine. The application is running inside the virtual machine and wherein the virtual machine is running on the host. The machine-readable instructions further comprise instructions to modify a layout of a guest physical address space, wherein the guest physical address space is corresponding to the guest virtual address space, to sequentialize a second memory access pattern in a host virtual address space. The second memory access pattern in the host virtual address space is corresponding to the first memory access pattern of the application in the guest virtual address space.
    Type: Application
    Filed: September 13, 2023
    Publication date: May 2, 2024
    Inventors: Chandra PRAKASH, Aravinda PRASAD, Sreenivas SUBRAMONEY
  • Publication number: 20230103447
    Abstract: Examples relate to an apparatus, device, method, and computer program for managing memory, and to a computer system comprising such an apparatus or device. The method comprises determining an impending access to a functionality provided by a virtual machine. The method comprises restoring a subset of memory pages associated with the virtual machine from a compressed memory pool to uncompressed memory according to a memory restoration template after determining the impending access to the virtual machine.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 6, 2023
    Inventors: Sreenivas SUBRAMONEY, Wajdi FEGHALI, Aravinda PRASAD, Alan NAIR
  • Patent number: 11556349
    Abstract: Methods that boot a secondary operating system (O/S) kernel with reclaimed primary kernel memory are disclosed herein. One method includes booting, via a processor performing a boot algorithm, a secondary kernel for an O/S in response to a primary kernel for the O/S going offline, in which the secondary kernel is configured to be loaded to a reserved memory area. The method further includes reclaiming memory space from the primary kernel for use in booting the secondary kernel in response to a determination that the reserved memory area includes insufficient memory space for completing the boot algorithm. Also disclosed herein are apparatus, systems, and computer program products that can include, perform, and/or implement the methods for providing a secondary kernel that includes a reserved area in memory.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: January 17, 2023
    Assignee: International Business Machines Corporation
    Inventors: Mahesh Jagannath Salgaonkar, Ananth Narayan Mavinakayanahalli, Kamalesh Babulal, Aravinda Prasad
  • Patent number: 11544153
    Abstract: According to aspects of the present disclosure, systems and methods can be provided to recover from memory errors that occur during or following a virtual machine migration. Methods, computer program products and/or systems are provided for handling memory error that perform the following operations: (i) obtaining a memory address that triggered an uncorrected error on a first host associated with a virtual machine migration; (ii) computing a page associated with the memory address; (iii) determining if a copy of the page associated with the memory address is available on a second host associated with the virtual machine migration; (iv) obtaining data from the copy of the page on the second host; and (v) generating a new page on the first host with the data obtained from the second host.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 3, 2023
    Assignee: International Business Machines Corporation
    Inventor: Aravinda Prasad
  • Publication number: 20220283954
    Abstract: Embodiments described herein are generally directed to maintaining contiguity of virtual to physical address mappings to exploit a contiguity-aware TLB. In an example, information regarding a migration set of one or more pages within a physical address space that have been identified for migration from a source tier of memory to a target tier of memory is received in which the physical address space comprises a first contiguous region of physical memory addresses and a VMA includes a second contiguous region of virtual memory addresses corresponding to the first contiguous region. It is determined whether the migration would break contiguity of a mapping maintained by a contiguity-aware TLB between pages of the first contiguous region and pages of the second contiguous region. Responsive an affirmative determination, discontinuities within the mapping resulting from the migration are minimized by intelligently increasing or decreasing the migration set.
    Type: Application
    Filed: May 26, 2022
    Publication date: September 8, 2022
    Applicant: Intel Corporation
    Inventors: Aravinda Prasad, Sreenivas Subramoney
  • Patent number: 11237891
    Abstract: Embodiments of the present disclosure facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in an error memory location of a memory and a kernel function impacted by the CE. The kernel function includes a plurality of instructions including a first instruction of the kernel function at a first physical location in a first region of the memory. The first region includes the error memory location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the kernel function at a second physical location in the second region of the memory. The first physical location in the first region of the memory is updated to include an instruction to branch to the second physical location in the second region of the memory.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: February 1, 2022
    Assignee: International Business Machines Corporation
    Inventors: Aravinda Prasad, Mahesh Jagannath Salgaonkar
  • Publication number: 20210286686
    Abstract: According to aspects of the present disclosure, systems and methods can be provided to recover from memory errors that occur during or following a virtual machine migration. Methods, computer program products and/or systems are provided for handling memory error that perform the following operations: (i) obtaining a memory address that triggered an uncorrected error on a first host associated with a virtual machine migration; (ii) computing a page associated with the memory address; (iii) determining if a copy of the page associated with the memory address is available on a second host associated with the virtual machine migration; (iv) obtaining data from the copy of the page on the second host; and (v) generating a new page on the first host with the data obtained from the second host.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 16, 2021
    Inventor: Aravinda Prasad
  • Publication number: 20210279069
    Abstract: Methods that boot a secondary operating system (O/S) kernel with reclaimed primary kernel memory are disclosed herein. One method includes booting, via a processor performing a boot algorithm, a secondary kernel for an O/S in response to a primary kernel for the O/S going offline, in which the secondary kernel is configured to be loaded to a reserved memory area. The method further includes reclaiming memory space from the primary kernel for use in booting the secondary kernel in response to a determination that the reserved memory area includes insufficient memory space for completing the boot algorithm. Also disclosed herein are apparatus, systems, and computer program products that can include, perform, and/or implement the methods for providing a secondary kernel that includes a reserved area in memory.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Inventors: Mahesh Jagannath Salgaonkar, Ananth Narayan Mavinakayanahalli, Kamalesh Babulal, Aravinda Prasad
  • Publication number: 20210248029
    Abstract: Embodiments of the present disclosure facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in an error memory location of a memory and a kernel function impacted by the CE. The kernel function includes a plurality of instructions including a first instruction of the kernel function at a first physical location in a first region of the memory. The first region includes the error memory location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the kernel function at a second physical location in the second region of the memory. The first physical location in the first region of the memory is updated to include an instruction to branch to the second physical location in the second region of the memory.
    Type: Application
    Filed: February 12, 2020
    Publication date: August 12, 2021
    Inventors: Aravinda Prasad, Mahesh Jagannath Salgaonkar
  • Publication number: 20210232312
    Abstract: Disclosed Methods, Apparatus, and articles of manufacture to profile page tables for memory management are disclosed. An example apparatus includes a processor to execute computer readable instructions to: profile a first page at a first level of a page table as not part of a target group; and in response to profiling the first page as not part of the target group, label a data page at a second level that corresponds to the first page as not part of the target group, the second level being lower than the first level.
    Type: Application
    Filed: March 26, 2021
    Publication date: July 29, 2021
    Inventors: Aravinda Prasad, Sandeep Kumar, Sreenivas Subramoney, Andy Rudoff
  • Publication number: 20210089467
    Abstract: Systems, apparatuses and methods may provide for technology that allocates a physical page for a virtual memory address associated with a fault, determines a size and layout of an address space containing the virtual memory address, and conducts a soft reservation of a set of contiguous physical memory pages based on the size and the layout of the address space.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Inventors: Aravinda Prasad, Sreenivas Subramoney
  • Publication number: 20210089411
    Abstract: Systems, apparatuses and methods may provide for technology that associates a unique identifier with an application, creates an entry in a metadata table, wherein the metadata table is at a fixed location in persistent system memory, populates the entry with the unique identifier, a user identifier, and a pointer to a root of a page table tree, and recovers in-use data pages after a system crash. In one example, the in-use data pages are recovered from the persistent system memory based on the metadata table and include one or more of application heap information or application stack information.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 25, 2021
    Inventors: Aravinda Prasad, Sreenivas Subramoney
  • Patent number: 10761918
    Abstract: Embodiments of the present invention facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in a physical error location of a memory and a kernel function impacted by the CE. The identified kernel function includes a plurality of instructions including a first instruction of the identified kernel function at a first physical memory location in a first region of the memory. The first region includes the physical error location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the identified kernel function at a second physical memory location in the second region of the memory. The first physical memory location in the first region of the memory is updated to include an instruction to branch to the second physical memory location in the second region of the memory.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: September 1, 2020
    Assignee: International Business Machines Corporation
    Inventors: Aravinda Prasad, Mahesh J. Salgaonkar
  • Patent number: 10621029
    Abstract: An application is identified that was running at a time of a system crash. A system dump file is received that was created responsive to the system crash. A restoration dataset stored in the system dump file is determined. The application is restored based, at least in part, on the restoration dataset.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Aravinda Prasad, Mahesh J. Salgaonkar
  • Patent number: 10621030
    Abstract: An application is identified that was running at a time of a system crash. A system dump file is received that was created responsive to the system crash. A restoration dataset stored in the system dump file is determined. The application is restored based, at least in part, on the restoration dataset.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Aravinda Prasad, Mahesh J. Salgaonkar
  • Publication number: 20190324830
    Abstract: Embodiments of the present invention facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in a physical error location of a memory and a kernel function impacted by the CE. The identified kernel function includes a plurality of instructions including a first instruction of the identified kernel function at a first physical memory location in a first region of the memory. The first region includes the physical error location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the identified kernel function at a second physical memory location in the second region of the memory. The first physical memory location in the first region of the memory is updated to include an instruction to branch to the second physical memory location in the second region of the memory.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 24, 2019
    Inventors: Aravinda Prasad, Mahesh J. Salgaonkar
  • Publication number: 20190188092
    Abstract: DRAM errors that are not correctable automatically when detected are handled by replacing corrupt data with replacement data obtained in a cache of the computer system in which the DRAM error is detected. Cached data includes copied datasets and corresponding memory addresses for identifying the copied data from a location where an uncorrected DRAM error occurs. Searching the cache by address identifies the replacement data.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventor: ARAVINDA PRASAD
  • Patent number: 9823921
    Abstract: An application is modified during execution by a hotpatch controller of a kernel receiving one or more new versions of a selection of one or more functions of multiple functions of an application and at least one selection criteria for applying the one or more new versions to the application during execution of the application to update a selection of one or more existing versions of the one or more functions. The hotpatch controller selectively transfers control from the selection of one or more existing versions of the one or more functions to the one or more new versions for only a selection of one or more processes that call the selection of one or more existing versions of the one or more functions from among multiple processes of the application, the selection of one or more processes each comprising one or more attributes matching the at least one selection criteria.
    Type: Grant
    Filed: September 17, 2016
    Date of Patent: November 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ananth N. Mavinakayanahalli, Aravinda Prasad, Suzuki K. Poulose
  • Patent number: 9652329
    Abstract: An application is identified that was running at a time of a system crash. A system dump file is received that was created responsive to the system crash. A restoration dataset stored in the system dump file is determined. The application is restored based, at least in part, on the restoration dataset.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: May 16, 2017
    Assignee: International Business Machines Corporation
    Inventors: Aravinda Prasad, Mahesh J. Salgaonkar