Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.

Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.

Abstract: One embodiment of the present invention is directed to an under bump metallurgy material. The under bump metallurgy material of this embodiment includes an adhesion layer and a conduction layer formed on top of the adhesion layer. The under bump metallurgy material of this embodiment also includes a barrier layer plated on top of the conduction layer and a sacrificial layer plated on top of the barrier layer. The conduction layer of this embodiment includes a trench formed therein, the trench contacting a portion of the barrier layer and blocking a path of intermetallic formation between the conduction layer and the sacrificial layer.

Abstract: One embodiment of the present invention is directed to an under bump metallurgy material. The under bump metallurgy material of this embodiment includes an adhesion layer and a conduction layer formed on top of the adhesion layer. The under bump metallurgy material of this embodiment also includes a barrier layer plated on top of the conduction layer and a sacrificial layer plated on top of the barrier layer. The conduction layer of this embodiment includes a trench formed therein, the trench contacting a portion of the barrier layer and blocking a path of intermetallic formation between the conduction layer and the sacrificial layer.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method determines interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, defines the top surface metallization including a series of orthogonal X conductor lines and Y conductor lines using photoresist and lithography and additive or subtractive metallization techniques and then uses a phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forms the top surface metallization.

Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.

Abstract: A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method comprises determining interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, defining the top surface metallization including a series of orthogonal X conductor lines and Y conductor lines using photoresist and lithography and additive or phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forming the top surface metallization.

Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.

Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.

Abstract: A process for partially repairing defective Multi-Chip Module (MCM) Thin-Film (TF) wiring nets. The process comprises the steps of locating a short circuit between any two nets of the MCM, identifying a site to cut in one of the two nets, and deleting an internal portion of one of the two nets at the identified site.

Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.

Abstract: A process for partially repairing defective Multi-Chip Module (MCM) Thin-Film (TF) wiring nets. The process comprises the steps of locating a short circuit between any two nets of the MCM, identifying a site to cut in one of the two nets, and deleting an internal portion of one of the two nets at the identified site.

Abstract: A Process for graphically assisting the partial repair of defective MCM TF wiring nets. The process comprises the steps of inserting the wiring layer of the thin-film device in a tester, scanning the wiring layer of the thin-film device with the tester, identifying defects in the wiring nets, prioritizing the defects based on a function of each of the defective wiring nets, and repairing the defects based on priority.