Patents by Inventor Arthur J. Beaverson

Arthur J. Beaverson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8880544
    Abstract: Method and apparatus for constructing an index that scales to a large number of records and provides a high transaction rate. New data structures and methods are provided to ensure that an indexing algorithm performs in a way that is natural (efficient) to the algorithm, while a non-uniform access memory device sees IO (input/output) traffic that is efficient for the memory device. One data structure, a translation table, is created that maps logical buckets as viewed by the indexing algorithm to physical buckets on the memory device. This mapping is such that write performance to non-uniform access SSD and flash devices is enhanced. Another data structure, an associative cache is used to collect buckets and write them out sequentially to the memory device as large sequential writes. Methods are used to populate the cache with buckets (of records) that are required by the indexing algorithm.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: November 4, 2014
    Assignee: SimpliVity Corporation
    Inventors: Paul Bowden, Arthur J. Beaverson
  • Patent number: 8713405
    Abstract: Allocation process that allows erasure coded data to be stored on any of a plurality of disk drives, in a pool of drives, so that the allocation is not tied to a fixed group of drives. Still further, the encoded data can be generated by any of multiple different erasure coding algorithms, where again storage of the encoded data is not restricted to a single group of drives based on the erasure algorithm being utilized to encode the data. In another embodiment, the encoded data can be “stacked” (aligned) on select drives to reduce the number of head seeks required to access the data. As a result of these improvements, the system can dynamically determine which one of multiple erasure coding algorithms to utilize for a given incoming data block, without being tied to one particular algorithm and one particular group of storage devices as in the prior art.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: April 29, 2014
    Assignee: SimpliVity Corporation
    Inventors: Michael W. Healey, Jr., David Cordella, Arthur J. Beaverson, Steven Bagby
  • Publication number: 20130290263
    Abstract: A digitally signed file system in which data, metadata and files are objects, each object having a globally unique and content-derived fingerprint and wherein object references are mapped by the fingerprints; the file system has a root object comprising a mapping of all object fingerprints in the file system, such that a change to the file system results in a change in the root object, and tracking changes in the root object provides a history of file system activity.
    Type: Application
    Filed: July 1, 2013
    Publication date: October 31, 2013
    Inventors: Arthur J. BEAVERSON, Paul BOWDEN
  • Publication number: 20130227195
    Abstract: Method and apparatus for storing records in non-uniform access memory. In various embodiments, the placement of records is localized in one or more regions of the memory. This can be accomplished utilizing different ordered lists of hash functions to preferentially map records to different regions of the memory to achieve one or more performance characteristics or to account for differences in the underlying memory technologies. For example, one ordered list of hash functions may localize the data for more rapid access. Another list of hash functions may localize the data that is expected to have a relatively short lifetime. Localizing such data may significantly improve the erasure performance and/or memory lifetime, e.g., by concentrating the obsolete data elements in one location. Thus, the two or more lists of ordered hash functions may improve one or more of access latency, memory lifetime, and/or operation rate.
    Type: Application
    Filed: February 24, 2012
    Publication date: August 29, 2013
    Applicant: SimpliVity Corporation
    Inventors: Arthur J. Beaverson, Paul BOWDEN, Sowmya Manjanatha, Jinsong Huang
  • Publication number: 20130227209
    Abstract: Apparatus and method for placing data based on the content of the data in random access memory such that indexing operations are not required. A strong (e.g., cryptographic) hash is applied to a data element resulting in a signature. A weaker hash function is then applied to the signature to generate a storage location in memory for the data element. The weaker hash function assigns multiple data elements to the same storage location while the signature comprises a unique identifier for locating a particular data element at this location. In one embodiment a plurality of weak hash functions are applied successively to increase storage space utilization. In other embodiments, the assigned storage location can be determined by one or more attributes of the data element and/or the storage technology, e.g, long-lived versus short-lived data and/or different regions of the memory having different performance (e.g., access latency memory lifetime) characteristics.
    Type: Application
    Filed: February 24, 2012
    Publication date: August 29, 2013
    Applicant: SimpliVity Corporation
    Inventors: John Michael CZERKOWICZ, Arthur J. Beaverson, Steven Bagby, Sowmya Manjanatha
  • Patent number: 8478799
    Abstract: Method and apparatus for providing a digitally signed file system wherein a namespace file system accesses an object store in which data, metadata and files are objects, each object having a globally unique and content-derived fingerprint and wherein object references are mapped by the fingerprints; the file system has a root object comprising a mapping of all object fingerprints in the file system, such that a change to the file system results in a change in the root object, and tracking changes in the root object provides a history of file system activity.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: July 2, 2013
    Assignee: SimpliVity Corporation
    Inventors: Arthur J. Beaverson, Paul Bowden
  • Publication number: 20130132800
    Abstract: Allocation process that allows erasure coded data to be stored on any of a plurality of disk drives, in a pool of drives, so that the allocation is not tied to a fixed group of drives. Still further, the encoded data can be generated by any of multiple different erasure coding algorithms, where again storage of the encoded data is not restricted to a single group of drives based on the erasure algorithm being utilized to encode the data. In another embodiment, the encoded data can be “stacked” (aligned) on select drives to reduce the number of head seeks required to access the data. As a result of these improvements, the system can dynamically determine which one of multiple erasure coding algorithms to utilize for a given incoming data block, without being tied to one particular algorithm and one particular group of storage devices as in the prior art.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: SimpliVity Corporation
    Inventors: Michael W. HEALEY, JR., David Cordella, Arthur J. Beaverson, Steven Bagby
  • Publication number: 20130024615
    Abstract: Method and apparatus for locating data on disk storage, wherein multiple instances of data can be stored at different locations to satisfy different use requirements such as read access, write access, and data security. The method allows a data storage system, such as a file system, to provide both read optimized and write optimized performance on disk storage of different types (e.g., sizes and speed).
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: SimpliVity Corporation
    Inventors: David Cordella, Arthur J. Beaverson, Steven Bagby
  • Patent number: 8346810
    Abstract: Methods and systems are provided for tracking object instances stored on a plurality of network nodes, which tracking enables a global determination of when an object has no references across the networked nodes and can be safely de-allocated. According to one aspect of the invention, each node has a local object store for tracking and optionally storing objects on the node, and the local object stores collectively share the locally stored instances of the objects across the network. One or more applications, e.g., a file system and/or a storage system, use the local object stores for storing all persistent data of the application as objects.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: January 1, 2013
    Assignee: SimpliVity Corporation
    Inventors: Arthur J. Beaverson, Kishore Chitrapu, John Michael Czerkowicz, Sowmya Manjanatha
  • Publication number: 20120331029
    Abstract: Method and apparatus for replicating data structures over a network in which each data structure is assigned an owner node among a plurality of networked peer nodes. Preferably that owner can be ascertained through information in the data structure. When an update to the data structure is desired by a non-owner, a request to modify the data structure is sent out on the network and when received by the owner, the owner performs the modification. The owner node can then notify the other nodes regarding the update. The method, implemented through a single-writer, multiple-reader paradigm, insures availability, partition tolerance and eventual consistency; it avoids the high overhead costs and single point of failure drawbacks of the prior art centralized management and locking protocols. Administrators can connect to any peer node in the network to manage, monitor and request modifications to a data structure.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 27, 2012
    Applicant: SimpliVity Corporation
    Inventors: James E. King, III, Michael T. Stack, Arthur J. Beaverson, Steven Bagby
  • Publication number: 20120290629
    Abstract: Methods and systems are provided for tracking object instances stored on a plurality of network nodes, which tracking enables a global determination of when an object has no references across the networked nodes and can be safely de-allocated. According to one aspect of the invention, each node has a local object store for tracking and optionally storing objects on the node, and the local object stores collectively share the locally stored instances of the objects across the network. One or more applications, e.g., a file system and/or a storage system, use the local object stores for storing all persistent data of the application as objects.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 15, 2012
    Applicant: SimpliVT Corporation
    Inventors: Arthur J. Beaverson, Kishore Chitrapu, John Michael Czerkowicz, Sowmya Manjanatha
  • Publication number: 20110022566
    Abstract: A digitally signed file system in which data, metadata and files are objects, each object having a globally unique and content-derived fingerprint and wherein object references are mapped by the fingerprints; the file system has a root object comprising a mapping of all object fingerprints in the file system, such that a change to the file system results in a change in the root object, and tracking changes in the root object provides a history of file system activity.
    Type: Application
    Filed: June 25, 2010
    Publication date: January 27, 2011
    Applicant: SimpliVT Corporation
    Inventors: Arthur J. Beaverson, Paul Bowden
  • Publication number: 20100332846
    Abstract: Method and apparatus for constructing an index that scales to a large number of records and provides a high transaction rate. New data structures and methods are provided to ensure that an indexing algorithm performs in a way that is natural (efficient) to the algorithm, while a non-uniform access memory device sees IO (input/output) traffic that is efficient for the memory device. One data structure, a translation table, is created that maps logical buckets as viewed by the indexing algorithm to physical buckets on the memory device. This mapping is such that write performance to non-uniform access SSD and flash devices is enhanced. Another data structure, an associative cache is used to collect buckets and write them out sequentially to the memory device as large sequential writes. Methods are used to populate the cache with buckets (of records) that are required by the indexing algorithm.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 30, 2010
    Applicant: SimpliVT Corporation
    Inventors: Paul Bowden, Arthur J. Beaverson
  • Patent number: 5860133
    Abstract: A memory of a computer system is sized and configured after the memory has been loaded with data. The sizing and configuration of the memory causes the data to become scattered among memory chips on a single memory module or among two or more memory modules. To gather the data, gather code loads itself into the instruction cache of the computer system and while executing from the instruction cache configures the memory and gathers the data in the memory such that it is again located at the same address it held before the configuration occurred.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: January 12, 1999
    Assignee: Digital Equipment Corporation
    Inventors: Arthur J. Beaverson, Stephen Francis Shirron, Harold Canute Buckingham, III
  • Patent number: 5694541
    Abstract: A console terminal arrangement is disclosed for use in connection with a fault-tolerant computer system including a plurality of processing modules, at least some of the processing modules including an operator input/output interface for receiving operator input from an operator input device and operator display output on an operator display device. The console terminal arrangement facilitates management of all of the processing modules by a single operator from a single location. The arrangement includes a console terminal and a plurality of processing module interfaces interconnected by a network. The console terminal includes an operator input device and an operator display device, and generates operator input messages including processing module management information generated by the operator input device in response to inputs provided by an operator and an address identifying one of the processing modules to be managed by the console terminal.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: December 2, 1997
    Assignee: Stratus Computer, Inc.
    Inventors: John D. Service, Walter A. Jones, Jr., Richard Urmston, Arthur J. Beaverson, Charles J. Horvath, Matthew A. Trask, John T. Vachon, Jeffrey D. Carter
  • Patent number: 5548719
    Abstract: A system and method for analyzing large logic traces, with the system having an input for regular expressions, a generator for receiving the regular expressions and generating finite automata which use arithmetic/logic expressions that permit the use of a substantially infinite alphabet, an input for a large trace array, and an analyzer for searching the large trace array with the finite automata, with the analyzer producing results of the search.
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: August 20, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Charles J. DeVane, Arthur J. Beaverson
  • Patent number: 5533195
    Abstract: A flexible software testing tool provides fast and efficient diagnosis of defective computer system devices. The software testing tool includes an action string command qualifier that enables dynamic exercising of target computer devices by specifying certain operations involving those devices. Additional command qualifiers are provided to define the operating conditions of the device interaction paths. The operations specified by the qualifiers typically require interactions between a plurality of devices, thereby creating combinations of device interaction paths within the system to detect intermittent device failures.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: July 2, 1996
    Inventors: Paul E. LaRochelle, Arthur J. Beaverson
  • Patent number: 5406504
    Abstract: An arrangement for a multiprocessor RISC system enables each CPU of the system to test the control logic of its cache by indirectly examining states of the caches and comparing those states to predetermined valid cache states of the system. The arrangement includes a plurality of processes configured to acquire information from selected block entries of the caches. The information is then compared with an array of predetermined valid cache states contained in a state table to detect invalid cache states. A cache examining protocol defines the operational procedures followed by the processes when acquiring and examining the information.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: April 11, 1995
    Assignee: Digital Equipment
    Inventors: John A. Denisco, Arthur J. Beaverson
  • Patent number: 5339240
    Abstract: A system for controlling the printing of a message having a plurality of strings of text and a plurality of parameters includes means for designating the locations of the strings of text, and the locations and formats of the parameters within the message. The system also includes means for switching the locations and the formats of the parameters after they have been designated, which may include a permutation specifier.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: August 16, 1994
    Assignee: Digital Equipment Corporation
    Inventor: Arthur J. Beaverson
  • Patent number: 5299206
    Abstract: A system and method for analyzing complex overlapping sequences of events in trace arrays, with the system having an input for receiving regular expressions that have been grouped in a predetermined manner, a generator for receiving the grouped regular expressions and generating multiple finite automata based on the groupings of regular expressions, with each finite automaton being generated using arithmetic/logic expressions to permit the use of a substantially infinite alphabet, an input for the trace array, and an analyzer for searching the trace array simultaneously with the multiple finite automata and providing a way by which the multiple finite automata may communicate with one another during searching, with the analyzer further outputting the results of the search.
    Type: Grant
    Filed: October 24, 1991
    Date of Patent: March 29, 1994
    Assignee: Digital Equipment Corporation
    Inventors: Arthur J. Beaverson, Charles J. DeVane