Patents by Inventor Ashish Malhotra

Ashish Malhotra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240075614
    Abstract: The system can include a set of joints, a controller, and a model engine; and can optionally include a support structure and an end effector. Joints can include: a motor, a transmission mechanism, an input sensor, and an output sensor. The system can enable articulation of the plurality of joints.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Abhinav Kumar, Aditya Bhatia, Akash Bansal, Anubhav Singh, Ashutosh Prakash, Aman Malhotra, Harshit Gaur, Prasang Srivasatava, Ashish Chauhan
  • Patent number: 9383794
    Abstract: An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: July 5, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Amit Aggarwal, Rohit Gupta, Ashish Malhotra, Andrey Malkov, Evgeny A. Shevchenko
  • Publication number: 20150362970
    Abstract: An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.
    Type: Application
    Filed: December 11, 2014
    Publication date: December 17, 2015
    Inventors: Amit Aggarwal, Rohit Gupta, Ashish Malhotra, Andrey Malkov, Evgeny A. Shevchenko
  • Publication number: 20150288366
    Abstract: An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 8, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Amit Aggarwal, Himanshu Goel, Ashish Malhotra, Ankit Pal
  • Patent number: 9148155
    Abstract: An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: September 29, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Amit Aggarwal, Himanshu Goel, Ashish Malhotra, Ankit Pal