Abstract: A rectifier circuit has one or more bridge circuits each with: a first leg with two diodes in series and an AC terminal at a midpoint between the two, a second leg with two semiconductor switches in parallel to the first, a third diode connected to a upper node of each leg, a fourth diode connected to a lower node of each leg, and a capacitor leg with two capacitors in series between the third and fourth diode. A midpoint between the capacitors is connected to a midpoint between the semiconductor switches. The first arrangement is two controllable semiconductor switches in series. A gate node of the second is connected to a first load terminal of the first switch and the first load terminal is connected to the lower node. The second semiconductor switch is a third controllable semiconductor switch with a gate node connected to the lower node.

Abstract: A rectifier circuit has one or more bridge circuits each with: a first leg with two diodes in series and an AC terminal at a midpoint between the two, a second leg with two semiconductor switches in parallel to the first, a third diode connected to a upper node of each leg, a fourth diode connected to a lower node of each leg, and a capacitor leg with two capacitors in series between the third and fourth diode. A midpoint between the capacitors is connected to a midpoint between the semiconductor switches. The first arrangement is two controllable semiconductor switches in series. A gate node of the second is connected to a first load terminal of the first switch and the first load terminal is connected to the lower node. The second semiconductor switch is a third controllable semiconductor switch with a gate node connected to the lower node.

Abstract: Various embodiments include a circuit arrangement for controlling a power semiconductor switch including a gate terminal, a source terminal, a drain terminal, and a conduction channel between the source and drain terminals, comprising: a controller for generating a control signal to alternate the semiconductor switch between a turned-on state and a turned-off state; a current source for injecting a current into the gate terminal; and an evaluation unit. The evaluation unit measures a voltage between the gate terminal and one of the source terminal and drain terminal while the semiconductor switch is in the turned-on state; and determines from the measured voltage and the current an absolute temperature of the semiconductor switch.

Abstract: Various embodiments include a circuit arrangement for controlling a power semiconductor switch including a gate terminal, a source terminal, a drain terminal, and a conduction channel between the source and drain terminals, comprising: a controller for generating a control signal to alternate the semiconductor switch between a turned-on state and a turned-off state; a current source for injecting a current into the gate terminal; and an evaluation unit. The evaluation unit measures a voltage between the gate terminal and one of the source terminal and drain terminal while the semiconductor switch is in the turned-on state; and determines from the measured voltage and the current an absolute temperature of the semiconductor switch.