Abstract: A method includes determining a first valid translation unit count (VTC) for a first block of memory cells, determining a second VTC for a second block of memory cells when the first VTC is below a VTC threshold corresponding to performance of a memory management operation, consolidating the first VTC and the second VTC when the consolidated first VTC and the second VTC equal or exceed the VTC threshold corresponding to the performance of the memory management operation, and executing the memory management operation utilizing the consolidated first VTC and the second VTC.

Abstract: A first block that is assigned a first sequence identifier can be identified. A determination can be made as to whether the assigned first sequence identifier satisfies a threshold sequence identifier condition that corresponds to a difference between the first sequence identifier assigned to the first block and second sequence identifier assigned to a second block. In response to determining that the assigned first sequence identifier satisfies the threshold sequence identifier condition, a media management operation can be performed on the first block.

Abstract: A processing device in a memory system receives a first read request from a host system, wherein the first read request is directed to first data stored at a first address in a block of the memory component. The processing device determines that the first address is located within a first region of the block and increments a read counter for the block by a default amount. The processing device further receives a second read request from the host system, wherein the second read request is directed to second data stored at a second address in a block of the memory component, determines that the second address is located within a second region of the block and increments the read counter for the block by a scaled amount.

Abstract: Disclosed in some examples are methods, systems, devices, memory devices, and machine-readable mediums for using a non-defective portion of a block of memory on which there is a defect on a different portion. Rather than disable the entire block, the system may disable only a portion of the block (e.g., a first deck of the block) and salvage a different portion of the block (e.g., a second deck of the block).

Abstract: Methods, systems, and devices for full multi-plane operation enablement are described. A flash controller can determine that a first plane of a set of planes of a memory die is an invalid plane. The flash controller can issue a single descriptor associated with a multi-plane operation for the set of planes of the memory die. The single descriptor can include a plurality of commands for the multi-plane operation in which the first command of the plurality of commands can be a duplicate of a second command of the plurality of commands based on the first plane being the invalid plane. In some cases, a negative-and (NAND) controller can receive the single descriptor associated with the multi-plane operation for the set of planes of a memory die. The NAND controller can issue a plurality of commands for the multi-plane operation based on receiving the single descriptor.

Abstract: A highly read data manager of a memory device receives a request to perform receives a request to perform a data relocation operation on a first wordline of a plurality of wordlines for a memory device, the memory device comprising a plurality of multi-level memory cells, wherein each multi-level memory cell comprises a plurality of pages; determines at the first wordline comprises data stored at one or more high read disturb pages of the plurality of pages; determines whether the data comprises a characteristic that satisfies a threshold criterion in relation to additional data stored on additional wordlines of the plurality of wordlines; responsive to determining that the data comprises the characteristic that satisfies the threshold criterion, identifies one or more low read disturb pages of the plurality of pages of a target wordline for relocating the data; and responsive to identifying the one or more low read disturb pages of the target wordline, stores at least a portion of the data at the one or more

Abstract: A method includes identifying a first block of a plurality of blocks stored at a first memory based on an amount of valid data of the first block, and writing the valid data of the first block from the first memory to a second memory. The first memory has a first memory type and the second memory has a second memory type different from the first memory type. The method further includes identifying a second block of the plurality of blocks stored at the first memory based on an age of valid data of the second block, determining that the age of the valid data of the second block satisfies a threshold condition, and in response to determining that the age of the valid data of the second block satisfies the threshold condition, writing the valid data of the second block from the first memory to the second memory.

Abstract: A failure of a first memory access operation is detected at a memory device. Responsive to the detection, a first error control operation and a second error control operation are performed. In response to a determination that the second error control operation has remedied the failed first memory access operation, the second error control operation is associated with a second priority which is higher than a first priority associated with the first error control operation.

Abstract: A distribution statistic is generated for a data block of a memory component based on a reliability statistic for memory cells sampled in the data block. The distribution statistic is indicative of at least one of a uniformity or a non-uniformity of read disturb stress on the sampled memory cells. At least a subset of the data block is relocated to another data block of the memory component in view of the distribution statistic.

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising determining a data validity metric value with respect to a source set of memory cells of the memory device; determining whether the data validity metric value satisfies a first threshold criterion; responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; determining whether the data integrity metric value satisfies a second threshold criterion; and responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device.

Abstract: An apparatus can include a partial superblock memory management component. The partial superblock memory management component can identify bad blocks in respective planes of a block of non-volatile memory cells. The partial superblock memory management component can determine that a plane of the respective planes includes at least good block in at least one different block of non-volatile memory cells. The partial superblock memory management component can perform an operation to reallocate the at least one good block in the plane to the at least one bad block in the plane to form blocks of non-volatile memory cells having a quantity of bad blocks that satisfies a bad block threshold.

Abstract: A variety of applications can include use of parity groups in a memory system with the parity groups arranged for data protection of the memory system. Each parity group can be structured with multiple data pages in which to write data and a parity page in which to write parity data generated from the data written in the multiple data pages. Each data page of a parity group can have storage capacity to include metadata of data written to the data page. Information can be added to the metadata of a data page with the information identifying an asynchronous power loss status of data pages that precede the data page in an order of writing data to the data pages of the parity group. The information can be used in re-construction of data in the parity group following an uncorrectable error correction code error in writing to the parity group.

Abstract: Apparatuses and methods for operating mixed mode blocks. One example method can include tracking single level cell (SLC) mode cycles and extra level cell (XLC) mode cycles performed on the mixed mode blocks, maintaining a mixed mode cycle count corresponding to the mixed mode blocks, and adjusting the mixed mode cycle count differently for mixed mode blocks operated in a SLC mode than for mixed blocks operated in a XLC mode.

Abstract: System and methods are disclosed include a memory device and a processing device coupled to the memory device. The processing device can determine an amount of valid management units in a memory device of a memory sub-system. The processing device can then determine a surplus amount of valid management units on the memory device based on the amount of valid management units. The processing device can then configure a size of a cache of the memory device based on the surplus amount of valid management units.

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including identifying an amount of storage charge loss (SCL) that has occurred on an open block of the memory device, the open block having one or more erased pages, determining that the amount of SCL satisfies a threshold criterion corresponding to an acceptable amount of SCL to occur on the open block, and responsive to determining that the amount of SCL satisfies the threshold criterion, keeping the open block open for programming the one or more erased pages.

Abstract: Systems and methods are disclosed, comprising a memory device comprising multiple groups of memory cells, the groups comprising a first group of memory cells and a second group of memory cells configured to store information at a same bit capacity per memory cell, and a processing device operably coupled to the memory device, the processing device configured to adjust a scan event threshold for one of the first or second groups of memory cells to a threshold less than a target scan event threshold for the first and second groups of memory cells to distribute scan events in time on the memory device.

Abstract: A method includes determining a health characteristic value of a block of memory cells, determining a difference between the health characteristic value and a health threshold, determining, based on the difference, a weight to associate with a block of memory cells, selecting, based on the weight, a block of memory cells for a media management operation; and performing a media management operation on the selected block of memory cells.

Abstract: A method includes determining that a ratio of valid data portions to a total quantity of data portions of a block of memory cells is greater than or less than a valid data portion threshold and determining that health characteristics for the valid data portions of the block of memory cells are greater than or less than a valid data health characteristic threshold. The method further includes performing a first media management operation on the block of memory cells in response to determining that the ratio of valid data portions to the total quantity of data portions is greater than the valid data portion threshold and performing a second media management operation on at least a portion of the block of memory cells in response to determining that the ratio of valid data portions to the total quantity of data portions is less than the valid data portion threshold and the health characteristics for the valid data portions are greater than the valid data health characteristic threshold.

Abstract: Read operations can be performed to read data stored at a data block. Parameters reflective of a separation between a pair of programming distributions associated with the data block can be determined based on the plurality of read operations. A read request to read the data stored at the data block can be received. In response to receiving the read request, a read operation can be performed to read the data stored at the data block based on the parameters that are reflective of the separation between the pair of programming distributions associated with the data block.

Abstract: A processing device, operatively coupled with the memory device, is configured to determine a first error rate associated a first set of pages of a plurality of pages of a data unit of a memory device, and a second error rate associated with a second set of pages of the plurality of pages of the data unit, determine a first pattern of error rate change for the data unit based on the first error rate and the second error rate, and responsive to determining that the first pattern of error rate change corresponds to a predetermined second pattern of error rate change, perform an action pertaining to defect remediation with respect to the data unit.