Patents by Inventor Atsuhiro Fujii

Atsuhiro Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5250468
    Abstract: The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350.degree. C.- 450.degree. C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: October 5, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masazumi Matsuura, Hideo Kotani, Atsuhiro Fujii, Shigeo Nagao, Hideki Genjo
  • Patent number: 5132774
    Abstract: The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350.degree. C.-450.degree. C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: July 21, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masazumi Matsuura, Hideo Kotani, Atsuhiro Fujii, Shigeo Nagao, Hideki Genjo
  • Patent number: 5077238
    Abstract: A method of manufacturing a semiconductor device in which an element is flattened by improving a technique of forming an interlayer insulating film. A thick insulating film having a film thickness necessary for a convexo-concave pattern to be flattened is deposited on a semiconductor substrate comprising the convexo-concave pattern of an element, a wiring and the like. Then, the thick insulating film is etched until it becomes a predetermined film thickness to form an interlayer insulating film having a predetermined film thickness from said thick insulating film. At this time, since acid and water are attached on the surface of the interlayer insulating film, a new film is formed on the surface of the interlayer insulating film to cover this water and acid. Then, a resist pattern having a desired configuration is formed on this new film. A contact hole is formed on the interlayer insulating film using this resist pattern.
    Type: Grant
    Filed: May 18, 1989
    Date of Patent: December 31, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Atsuhiro Fujii, Toshihiko Minami, Hideki Genjo
  • Patent number: 5047127
    Abstract: An ozone generating method for increasing the quantity of ozone produced by a silent discharge in high purity oxygen includes mixing nitrogen with the high purity oxygen in a predetermined ratio. The nitrogen gas is a catalyst for stable and highly efficient ozone generation from a high purity oxygen source.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: September 10, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Isao Tottori, Masazumi Matsuura, Atsuhiro Fujii
  • Patent number: 4984055
    Abstract: A semiconductor device having a plurality of conductive layers is disclosed. The device has first level conductors (9) formed spaced apart on a semiconductor substrate (1). The semiconductor substrate (1) is provided with impurity diffusion regions (11) in its major surface between adjacent first level conductors (9). A triple layer insulation formed of a pair of oxide layers (12, 14) and an silicon oxide layer (13) sandwiched between the oxide layers (12, 14) covers the semiconductor substrate (1) and the first level conductors (9) thereon. At least one contact hole (15) is formed to extend through the triple layer insulation to either the impurity diffusion region (11) in the semiconductor substrate (1) or the first level conductor (9) on the semiconductor substrate (1). A second level conductor (16, 17) is provided on the triple layer insulation and on the inner surrounding wall of the contact hole (15).
    Type: Grant
    Filed: November 7, 1988
    Date of Patent: January 8, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinori Okumura, Atsuhiro Fujii, Masao Nagatomo, Hiroji Ozaki, Wataru Wakamiya, Takayuki Matsukawa