Patents by Inventor Atsumi Yamaguchi

Atsumi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200375970
    Abstract: Disclosed is a therapeutic agent for hepatocellular carcinoma, comprising 5-((2-(4-(2-hydroxyethyl)piperidin-4-yl)benzamide)pyridin-4-yl)oxy)-6-(2-methoxyethoxy)-N-methyl-1H-indole-1-carboxamide or a pharmacologically acceptable salt thereof.
    Type: Application
    Filed: March 26, 2019
    Publication date: December 3, 2020
    Applicant: Eisai R&D Management Co., Ltd.
    Inventors: Atsumi Yamaguchi, Hajime Shimizu, Satoshi Goda, Saori Miyano
  • Publication number: 20200199689
    Abstract: The purpose of the present invention is to provide a method for predicting the effectiveness of an angiogenesis inhibitor in a subject suffering from a tumor. Provided is a method comprising a step of testing for the presence or absence of an a mutation or loss of expression of B-Raf and PTEN in a sample of tumor tissue from the subject. By using the presence or absence of or a mutation or loss of expression of B-Raf and PTEN as an indicator, this method enables the antitumor effectiveness of the angiogenesis inhibitor to be predicted without administering the angiogenesis inhibitor to the subject.
    Type: Application
    Filed: March 4, 2020
    Publication date: June 25, 2020
    Applicant: Eisai R&D Management Co., Ltd.
    Inventors: Taro Semba, Yusuke Narita, Yukinori Minoshima, Atsumi Yamaguchi, Yusuke Adachi, Kazuhiko Yamada, Junji Matsui, Tadashi Kadowaki, Kentaro Takahashi, Yasuhiro Funahashi
  • Publication number: 20170191137
    Abstract: The purpose of the present invention is to provide a method for predicting the effectiveness of an angiogenesis inhibitor in a subject suffering from a tumor. Provided is a method comprising a step of testing for the presence or absence of an a mutation or loss of expression of B-Raf and PTEN in a sample of tumor tissue from the subject. By using the presence or absence of or a mutation or loss of expression of B-Raf and PTEN as an indicator, this method enables the antitumor effectiveness of the angiogenesis inhibitor to be predicted without administering the angiogenesis inhibitor to the subject.
    Type: Application
    Filed: March 16, 2017
    Publication date: July 6, 2017
    Applicant: Eisai R&D Management Co., Ltd.
    Inventors: Taro Semba, Yusuke Narita, Yukinori Minoshima, Atsumi Yamaguchi, Yusuke Adachi, Kazuhiko Yamada, Junji Matsui, Tadashi Kadowaki, Kentaro Takahashi, Yasuhiro Funahashi
  • Publication number: 20140148483
    Abstract: The purpose of the present invention is to provide a method for predicting the effectiveness of an angiogenesis inhibitor in a subject suffering from a tumor. Provided is a method comprising a step of testing for the presence or absence of an a mutation or loss of expression of B-Raf and PTEN in a sample of tumor tissue from the subject. By using the presence or absence of or a mutation or loss of expression of B-Raf and PTEN as an indicator, this method enables the antitumor effectiveness of the angiogenesis inhibitor to be predicted without administering the angiogenesis inhibitor to the subject.
    Type: Application
    Filed: May 16, 2012
    Publication date: May 29, 2014
    Applicant: EISAI R&D MANAGEMENT CO., LTD.
    Inventors: Taro Semba, Yusuke Narita, Yukinori Minoshima, Atsumi Yamaguchi, Yusuke Adachi, Kazuhiko Yamada, Junji Matsui, Tadashi Kadowaki, Kentaro Takahashi, Yasuhiro Funahashi
  • Publication number: 20120193763
    Abstract: To provide a method of manufacturing a semiconductor device with reduced generation of humps, a semiconductor device with reduced generation of humps, and a resist coater. An inactive liquid such as pure water is discharged at a predetermined pressure from a nozzle for discharging fluid for processing hump while spinning the semiconductor substrate to spray a region where a hump is generated. The hump is crushed by spraying the inactive liquid at a high pressure onto the hump, and the film thickness of the bottom-layer resist becomes almost uniform across the entire semiconductor substrate.
    Type: Application
    Filed: January 11, 2012
    Publication date: August 2, 2012
    Inventor: Atsumi YAMAGUCHI
  • Publication number: 20110118470
    Abstract: Compounds represented by the following general formula: wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—), Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.), salts thereof or hydrates of the foregoing.
    Type: Application
    Filed: January 7, 2011
    Publication date: May 19, 2011
    Inventors: Yasuhiro FUNAHASHI, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Publication number: 20100197911
    Abstract: Compounds represented by the following general formula: [wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—, Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.)], salts thereof or hydrates of the foregoing.
    Type: Application
    Filed: October 2, 2008
    Publication date: August 5, 2010
    Applicant: Eisai R&D Management Co., Ltd.
    Inventors: Yasuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Patent number: 7612092
    Abstract: Compounds represented by the following general formula: [wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—, Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.)], salts thereof or hydrates of the foregoing.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: November 3, 2009
    Assignee: Eisai R & D Management Co., Ltd.
    Inventors: Yasuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui
  • Publication number: 20080241489
    Abstract: A method of forming a resist pattern through liquid immersion exposure in which exposure is performed such that a liquid film is formed between a substrate for a semiconductor device on which a processed film is formed and an objective lens arranged above the substrate is provided, and the substrate treated with a water-repellent agent solution composed of at least a water-repellent agent and a solvent is exposed to light.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 2, 2008
    Inventors: Takeo Ishibashi, Mamoru Terai, Takuya Hagiwara, Atsumi Yamaguchi
  • Patent number: 7253286
    Abstract: Compounds represented by the following general formula: [wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—, Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.)], salts thereof or hydrates of the foregoing.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: August 7, 2007
    Assignee: Eisai Co., Ltd
    Inventors: Yasuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Publication number: 20060247259
    Abstract: Compounds represented by the following general formula: [wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—, Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.)], salts thereof or hydrates of the foregoing.
    Type: Application
    Filed: December 2, 2005
    Publication date: November 2, 2006
    Inventors: Yasuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Publication number: 20060160832
    Abstract: Compounds represented by the following general formula: [wherein Ag is an optionally substituted 5- to 14-membered heterocyclic group, etc.; Xg is —O—, —S—, etc.; Yg is an optionally substituted C6-14 aryl group, an optionally substituted 5- to 14-membered heterocyclic group, etc.; and Tg1 is a group represented by the following general formula: (wherein Eg is a single bond or —N(Rg2)—, Rg1 and Rg2 each independently represent a hydrogen atom, an optionally substituted C1-6 alkyl group, etc. and Zg represents a C1-8 alkyl group, a C3-8 alicyclic hydrocarbon group, a C6-14 aryl group, etc.)], salts thereof or hydrates of the foregoing.
    Type: Application
    Filed: February 3, 2006
    Publication date: July 20, 2006
    Inventors: Yosuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Patent number: 6960481
    Abstract: A high-reliability evaluation technique is proposed which is related to semiconductor device manufacture. A photoresist formed on a wafer is subjected to exposure and development thereby to form a pair of opposed patterns (1, 2) with distance x in the photoresist, followed by measurement of distance x between the patterns (1, 2) in the photoresist. For example, the amount of variations in exposure energy is evaluated by using the measuring result. The evaluation is made by using distance x between patterns (1, 2) which are easy to change with variations in exposure energy, etc., thus improving the reliability of evaluation.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: November 1, 2005
    Assignee: Renesas Technology Corp.
    Inventor: Atsumi Yamaguchi
  • Patent number: 6938238
    Abstract: In a method of forming a circuit pattern including fine pattern features and fine space, a hard mask layer is patterned with a first pattern defined by eliminating the fine space for merging the pattern features. Thereafter the hard mask layer is shrank. Next, the hard mask layer is patterned with a second pattern that is defined on the basis of the fine space. Finally, the circuit pattern is formed in an underlying layer using the hard mask layer as a mask.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: August 30, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Okagawa, Tetsuya Yamada, Atsushi Ueno, Atsumi Yamaguchi, Kouichirou Tsujita
  • Patent number: 6849486
    Abstract: The reduction of length of a gate electrode is suppressed in the process of thinning it. A hard mask (5a) is thinned and used to etch a gate electrode material film (4) to form a gate electrode. At this time, a resist mask (10) having an opening (11) over an active region (1) is formed; the resist mask (10) covers at least both ends in the length direction of the hard mask (5a) and exposes in the opening (11) at least the entirety of the part of the hard mask (5a) which lies right above the active region (1). The hard mask (5a) is thinned by etching using the resist mask (10) as a mask and therefore the hard mask (5a) is thinned in the part over the active region (1) without being shortened in the length direction. As a result, the gate electrode formed by using the thinned hard mask (5a) is not shortened in length.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: February 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Yamada, Atsushi Ueno, Kouichirou Tsujita, Atsumi Yamaguchi, Takashi Okagawa
  • Patent number: 6774043
    Abstract: Ions are implanted into a resist pattern for forming a wiring pattern. Argon is employed as the ion species, for performing ion implantation under 50 keV at 1×1016/cm2. Due to the ion implantation, the thickness of the resist pattern contracts to about 334 nm, i.e., about 75% of the thickness of 445 nm before ion implantation, while the composition of the resist pattern changes for improving resistance against etching for a silicon nitride film and a polysilicon layer. Thus obtained is a method of manufacturing a semiconductor device capable of suppressing critical dimension shift density difference (difference between a critical dimension shift on a rough region having a relatively large space width and that on a dense region having a relatively small space width).
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: August 10, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Atsumi Yamaguchi, Kouichirou Tsujita
  • Publication number: 20040102048
    Abstract: According to the present invention, in a method for manufacturing a semiconductor device, an underlayer film is formed on a substrate. A resist pattern is formed on the underlayer film. A spin-on glass film is formed on the underlayer film and the resist pattern so as to cover the resist pattern. The resist pattern is removed to produce a reversal pattern in the spin-on glass film. The underlayer film is etched by using the spin-on glass film as a mask to form a fine pattern.
    Type: Application
    Filed: June 10, 2003
    Publication date: May 27, 2004
    Applicant: Renesas Technology Corp.
    Inventor: Atsumi Yamaguchi
  • Publication number: 20040053908
    Abstract: Compounds represented by the following general formula: 1
    Type: Application
    Filed: April 18, 2003
    Publication date: March 18, 2004
    Inventors: Yasuhiro Funahashi, Akihiko Tsuruoka, Masayuki Matsukura, Toru Haneda, Yoshio Fukuda, Junichi Kamata, Keiko Takahashi, Tomohiro Matsushima, Kazuki Miyazaki, Ken-ichi Nomoto, Tatsuo Watanabe, Hiroshi Obaishi, Atsumi Yamaguchi, Sachi Suzuki, Katsuji Nakamura, Fusayo Mimura, Yuji Yamamoto, Junji Matsui, Kenji Matsui, Takako Yoshiba, Yasuyuki Suzuki, Itaru Arimoto
  • Publication number: 20040054981
    Abstract: In a method of forming a circuit pattern including fine pattern features and fine space, a hard mask layer is patterned with a first pattern defined by eliminating the fine space for merging the pattern features. Thereafter the hard mask layer is shrank. Next, the hard mask layer is patterned with a second pattern that is defined on the basis of the fine space. Finally, the circuit pattern is formed in an underlying layer using the hard mask layer as a mask.
    Type: Application
    Filed: February 10, 2003
    Publication date: March 18, 2004
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Takashi Okagawa, Tetsuya Yamada, Atsushi Ueno, Atsumi Yamaguchi, Kouichirou Tsujita
  • Publication number: 20030216018
    Abstract: The reduction of length of a gate electrode is suppressed in the process of thinning it. A hard mask (5a) is thinned and used to etch a gate electrode material film (4) to form a gate electrode. At this time, a resist mask (10) having an opening (11) over an active region (1) is formed; the resist mask (10) covers at least both ends in the length direction of the hard mask (5a) and exposes in the opening (11) at least the entirety of the part of the hard mask (5a) which lies right above the active region (1). The hard mask (5a) is thinned by etching using the resist mask (10) as a mask and therefore the hard mask (5a) is thinned in the part over the active region (1) without being shortened in the length direction. As a result, the gate electrode formed by using the thinned hard mask (5a) is not shortened in length.
    Type: Application
    Filed: November 21, 2002
    Publication date: November 20, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Tetsuya Yamada, Atsushi Ueno, Kouichirou Tsujita, Atsumi Yamaguchi, Takashi Okagawa