Patents by Inventor Atsuo Fukui
Atsuo Fukui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9236727Abstract: Provided is a current mode step-down switching regulator which is capable of enhancing over-current limiting characteristics even when an over-current limiting function operates to reduce an output voltage. The current mode step-down switching regulator includes a pulse adjusting circuit. When an over-current is detected, a switching output signal is thinned out by the pulse adjusting circuit to be outputted in order to reduce an apparent oscillation frequency, thereby reducing an influence by response delay in an over-current detecting comparator.Type: GrantFiled: May 11, 2005Date of Patent: January 12, 2016Assignee: SEIKO INSTRUMENTS INC.Inventor: Atsuo Fukui
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Patent number: 6998826Abstract: To provide a voltage regulator that operates even when an input power source voltage and an output voltage are small, that is, even when the difference between input and output voltages is small.Type: GrantFiled: September 10, 2003Date of Patent: February 14, 2006Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Publication number: 20050254184Abstract: Provided is a current mode step-down switching regulator which is capable of enhancing over-current limiting characteristics even when an over-current limiting function operates to reduce an output voltage. The current mode step-down switching regulator includes a pulse adjusting circuit. When an over-current is detected, a switching output signal is thinned out by the pulse adjusting circuit to be outputted in order to reduce an apparent oscillation frequency, thereby reducing an influence by response delay in an over-current detecting comparator.Type: ApplicationFiled: May 11, 2005Publication date: November 17, 2005Inventor: Atsuo Fukui
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Patent number: 6885177Abstract: A switching regulator has an input terminal for receiving an input voltage, an output terminal for outputting an output voltage, a coil connected between the input terminal and the output terminal, and a slope correcting circuit for outputting a signal adapted to carry out slope correction for preventing current oscillation. An error amplifier compares one of the output voltage and a voltage division value of the output voltage with a reference voltage to output a signal, and a switch controls the output voltage with a signal generated using results obtained by arithmetically operating the output signal of the slope correcting circuit and the output signal of the error amplifier. The slope correcting circuit outputs a signal obtained by adjusting the signal adapted to carry out the slope correction in correspondence to the output voltage.Type: GrantFiled: July 24, 2003Date of Patent: April 26, 2005Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Publication number: 20050029999Abstract: To provide a voltage regulator that operates even when an input power source voltage and an output voltage are small, that is, even when the difference between input and output voltages is small.Type: ApplicationFiled: September 10, 2003Publication date: February 10, 2005Inventor: Atsuo Fukui
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Patent number: 6801419Abstract: A voltage regulator is provided in which an abnormal operation of an overcurrent protection circuit is prevented. The voltage regulator makes operating states of a PMOS output driver transistor and a first PMOS sense transistor always the same to set a ratio of currents flowing to the transistors equal to a transistor size ratio thereof, thereby solving the problem that a load current under which an overcurrent protection operates becomes inaccurate by the decrease in an output voltage due to an abnormal operation of an overcurrent protection circuit in the case in which a different of an input voltage VIN and an output voltage VOUT is small and the influence of channel length modulation in the case in which the difference of an input voltage VIN and an output voltage VOUT is large.Type: GrantFiled: June 21, 2002Date of Patent: October 5, 2004Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Patent number: 6798277Abstract: A reference voltage circuit is provided in which a difference of voltages applied to reference voltage circuits is reduced so that a difference of respective output voltages is made small. Depletion type MOS transistors (3, 6) are respectively connected in series with the drains of depletion type MOS transistors (1, 4) in two ED type reference voltage circuits. The gate of one of the series-connected depletion type MOS transistors (3, 6) is connected with the source of the other MOS transistor and the gate of the other MOS transistor is connected with the source of the one MOS transistor. Thus, a difference of voltages applied to the respective ED type reference voltage circuits is reduced so that a difference of respective output voltages is made small.Type: GrantFiled: January 23, 2003Date of Patent: September 28, 2004Assignee: Seiko Instruments Inc.Inventors: Takao Nakashimo, Atsuo Fukui
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Publication number: 20040135567Abstract: A switching regulator is provided, in which even if the output voltage VOUT is changed, a suitable amount of slope correction can be maintained. The switching regulator includes: an input terminal through which an input voltage is inputted; an output terminal through which an output voltage is outputted; a coil connected between the input terminal and the output terminal; a slope correcting circuit for outputting a signal adapted to carry out slope correction for preventing current oscillation; an error amplifier for comparing one of the output voltage and a voltage division value of the output voltage with a reference voltage to output a signal; and a switch for controlling the output voltage with a signal generated using results obtained by arithmetically operating the output signal of the slope correcting circuit and the output signal of the error amplifier.Type: ApplicationFiled: July 24, 2003Publication date: July 15, 2004Inventor: Atsuo Fukui
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Patent number: 6737843Abstract: The present invention provides a PWM switching regulator circuit capable of reducing power consumption while it is operated under a light load. When load condition is changed from a heavy load to a light load, an internal oscillation frequency is changed from a first oscillation frequency to a second oscillation frequency lower than the first oscillation frequency, while when the load condition is changed from the light load to the heavy load, the internal oscillation frequency is returned from the second oscillation frequency back to the first oscillation frequency in accordance with an ON/OFF ratio of a signal used to control a switch of a PWM switching regulator circuit.Type: GrantFiled: January 30, 2003Date of Patent: May 18, 2004Assignee: Seiko Instruments Inc.Inventors: Yoshihide Kanakubo, Atsuo Fukui
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Patent number: 6677810Abstract: A high accuracy reference voltage stably operating even at a low power supply voltage is provided in a semiconductor integrated circuit. A circuit structure in which the stable reference voltage can be obtained even at the low power source voltage is adopted.Type: GrantFiled: February 7, 2002Date of Patent: January 13, 2004Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Publication number: 20030174014Abstract: A reference voltage circuit is provided in which a difference of voltages applied to reference voltage circuits is reduced so that a difference of respective output voltages is made small. Depletion type MOS transistors (3, 6) are respectively connected in series with the drains of depletion type MOS transistors (1, 4) in two ED type reference voltage circuits. The gate of one of the series-connected depletion type MOS transistors (3, 6) is connected with the source of the other MOS transistor and the gate of the other MOS transistor is connected with the source of the one MOS transistor. Thus, a difference of voltages applied to the respective ED type reference voltage circuits is reduced so that a difference of respective output voltages is made small.Type: ApplicationFiled: January 23, 2003Publication date: September 18, 2003Inventors: Takao Nakashimo, Atsuo Fukui
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Publication number: 20030169026Abstract: The present invention provides a PWM switching regulator circuit capable of reducing power consumption while it is operated under a light load. When load condition is changed from a heavy load to a light load, an internal oscillation frequency is changed from a first oscillation frequency to a second oscillation frequency lower than the first oscillation frequency, while when the load condition is changed from the light load to the heavy load, the internal oscillation frequency is returned from the second oscillation frequency back to the first oscillation frequency in accordance with an ON/OFF ratio of a signal used to control a switch of a PWM switching regulator circuit.Type: ApplicationFiled: January 30, 2003Publication date: September 11, 2003Inventors: Yoshihide Kanakubo, Atsuo Fukui
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Publication number: 20030011952Abstract: A voltage regulator is provided in which an abnormal operation of an overcurrent protection circuit is prevented. The voltage regulator makes operating states of a PMOS output driver transistor and a first PMOS sense transistor always the same to set a ratio of currents flowing to the transistors equal to a transistor size ratio thereof, thereby solving the problem that a load current under which an overcurrent protection operates becomes inaccurate by the decrease in an output voltage due to an abnormal operation of an overcurrent protection circuit in the case in which a different of an input voltage VIN and an output voltage VOUT is small and the influence of channel length modulation in the case in which the difference of an input voltage VIN and an output voltage VOUT is large.Type: ApplicationFiled: June 21, 2002Publication date: January 16, 2003Inventor: Atsuo Fukui
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Publication number: 20020109542Abstract: A high accuracy reference voltage stably operating even at a low power supply voltage is provided in a semiconductor integrated circuit. A circuit structure in which the stable reference voltage can be obtained even at the low power source voltage is adopted.Type: ApplicationFiled: February 7, 2002Publication date: August 15, 2002Inventor: Atsuo Fukui
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Patent number: 6424130Abstract: An output voltage detecting circuit is added to a step-down DC-DC converter or a step-up DC-DC converter and is controlled so that an abnormally high increase in a regulated output voltage of the DC-DC converter is detected and the output voltage is inhibited from increasing further so that it may be rapidly returned to a normal value within the range of regulated voltages of the DC-DC converter.Type: GrantFiled: April 18, 2000Date of Patent: July 23, 2002Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Patent number: 6420857Abstract: A regulator is provided with circtuiry for restraining a variation in a frequency band and to provide a transient response characteristic which does not depend upon load current. A load current detecting transistor is connected in parallel with an output driver transistor of the regulator to detect load current. The ON resistance of a transistor of a phase compensation RC network is varied in accordance with current variations detected by the load current detecting transistor. As a result, a frequency of a zero point for phase compenstation of the RC network is varied so that the frequency band of the regulator does not vary with load current and the transient response characteristic of the regulator is improved.Type: GrantFiled: February 7, 2001Date of Patent: July 16, 2002Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Publication number: 20010028240Abstract: To provide a regulator for restraining a variation in a frequency band and having a transient response characteristic which does not depend upon load current, by generating current in proportion to load current by a load current detecting transistor connected in parallel with an output driver transistor for supplying current to a load and changing a resistance value of a variable resistance portion by the current, a frequency of a zero point for phase compensation is varied and by varying the frequency of the zero point for phase compensation in accordance with the load current, the variation in the frequency band of the regulator is restrained without depending upon the load current and the transient response characteristic is improved.Type: ApplicationFiled: February 7, 2001Publication date: October 11, 2001Inventor: Atsuo Fukui
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Patent number: 6114906Abstract: To eliminate the offset voltage of a differential amplifier and ensure stable operation even when an input voltage is zero, a settable constant current source and a level shifting circuit are connected to at least one of the non-inverted and inverted input terminals of a differential amplifier. The constant current source produces a constant current that is set according to the offset voltage of the differential amplifier. In one embodiment, the level shifting circuit comprises a pair of depletion mode P-MOS transistors each connected in series to a settable constant current source, the respective series-connected pairs being connected to each input of the differential amplifier. The constant current source has a constant current value that may be varied by trimming using a laser or the like. By setting the output voltages of each such circuit equal, the offset voltage of the differential amplifier is eliminated.Type: GrantFiled: March 24, 1999Date of Patent: September 5, 2000Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui