Patents by Inventor Atsuo Watanabe

Atsuo Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180345116
    Abstract: An information processing apparatus includes circuitry that analyzes a motion of a user by determining a start time and an end time of a motion session from characteristics of motion data regarding the motion of the user. The motion data is indicative of a type of sports-related motion performed by the user.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 6, 2018
    Inventors: ATSUO WATANABE, YOSHIHIRO NAKANISHI, TAKAOMI KIMURA, D. FORREST MATTHEW, MUNECHIKA MAEKAWA, CHIYA WATANABE, NOBUHIRO JOGANO, KATSUJI MIYAZAWA, TATSUYA OHSAKI, KOSEI YAMASHITA
  • Patent number: 10065100
    Abstract: An information processing apparatus includes circuitry that analyzes a motion of a user by determining a start time and an end time of a motion session from characteristics of motion data regarding the motion of the user. The motion data is indicative of a type of sports-related motion performed by the user.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: September 4, 2018
    Assignee: SONY CORPORATION
    Inventors: Atsuo Watanabe, Yoshihiro Nakanishi, Takaomi Kimura, D. Forrest Matthew, Kosei Yamashita, Munechika Maekawa, Chiya Watanabe, Nobuhiro Jogano, Katsuji Miyazawa, Tatsuya Ohsaki
  • Publication number: 20160107063
    Abstract: An information processing apparatus includes circuitry that analyzes a motion of a user by determining a start time and an end time of a motion session from characteristics of motion data regarding the motion of the user. The motion data is indicative of a type of sports-related motion performed by the user.
    Type: Application
    Filed: April 22, 2014
    Publication date: April 21, 2016
    Inventors: ATSUO WATANABE, YOSHIHIRO NAKANISHI, TAKAOMI KIMURA, D. FORREST MATTHEW, KOSEI YAMASHITA, MUNECHIKA MAEKAWA, CHIYA WATANABE, NOBUHIRO JOGANO, KATSUJI MIYAZAWA, TATSUYA OHSAKI
  • Publication number: 20120205668
    Abstract: A switching semiconductor device is provided, in which a negative gate voltage can be applied to the semiconductor device in an OFF state so as to increase a breakdown voltage of the gate junction without impairing a normally-off function of the semiconductor device and the ON-resistance. The switching semiconductor device is fabricated by using a semiconductor substrate with a band gap of 2.0 eV or more. In a JFET structure where a p+ type gate region and an n type source region are in contact so that a negative gate voltage can be applied, the p+ type gate region and an n+ type source region with a high impurity concentration are disposed with interposing an n type source region with an impurity concentration lower than that of the p+ type gate region and higher than that of a drift region of the JFET therebetween.
    Type: Application
    Filed: April 24, 2012
    Publication date: August 16, 2012
    Inventor: Atsuo WATANABE
  • Patent number: 8134207
    Abstract: In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region formed by an element active layer, both high integration and high breakdown voltage are realized while also securing suitability for practical implementation and practical use. The high breakdown voltage is realized without hampering size reduction of the element by forming an electrically floating layer of a conductivity type opposite to that of the drain region at the surface of the drain region. Further, the thickness of the embedded oxide layer is reduced to a level suitable for the practical implementation and practical use by setting the thickness of the element active layer of the SOI substrate at 30 ?m or more.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: March 13, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Atsuo Watanabe
  • Patent number: 8135151
    Abstract: In an audio signal reproduction device and an audio signal reproduction system of the present invention, an SLch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5a, 5d located at Lch and SBLch speaker positions, and an SRch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5b, 5e located at Rch and SBRch speaker positions. This configuration can achieve 5.1ch virtual reproduction with high sound quality in which sounds for 5.1 channels of LPCM 7.1ch audio information included in the contents are output as they are and sounds for the remaining 2 channels are reproduced artificially even if speakers compatible with the 5.1ch sound field system are connected.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: March 13, 2012
    Assignee: Panasonic Corporation
    Inventor: Atsuo Watanabe
  • Patent number: 8081781
    Abstract: For achieving an audio reproduction with high sound quality, in a multi-channel A/V amplifier, front speakers are driven with a parallel-drive bi-amplifier arrangement upon stereo reproduction. In the case of the multi-channel reproduction mode, the switching circuit allows an output signal of each channel of the decoder to be sent to speakers via amplifiers for each channel in one-to-one correspondence. On the other hand, in the case of the 2-channel stereo reproduction mode, the switching circuit allows at least two amplifiers among the plurality of amplifiers to be connected in parallel between the output signal for each of the channels L and R of the decoder and the speakers for each of the channels L and R, and also allows the timing of the output signals of the respective amplifiers to be varied.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: December 20, 2011
    Assignee: Panasonic Corporation
    Inventor: Atsuo Watanabe
  • Patent number: 7982266
    Abstract: A dielectrically isolated semiconductor device of high reliability is provided by realizing a fine and deep element isolating region which can prevent dislocation of an oxide film as an insulation layer by oxidation-induced stress. The dielectrically isolated semiconductor device includes an SOI substrate supporting an active element layer deeper than an expanded distance of a depletion layer subjected to the highest voltage applied to the device, and an element isolating region which encloses the active element layer. The element isolating region contains a deep trench which comes into contact with the insulation layer, and which is filled with n heavily doped layers on both side walls, second insulation films each adjacent to the n heavily doped layer and a polycrystalline semiconductor layer formed between the second insulation films.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: July 19, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Atsuo Watanabe, Mitsutoshi Honda, Norio Ishitsuka, Masahiro Ito, Toshihito Tabata, Shinichi Kurita, Hidekazu Kamioka
  • Patent number: 7855384
    Abstract: A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: December 21, 2010
    Assignees: DENSO CORPORATION, Hitachi Ltd.
    Inventors: Tsuyoshi Yamamoto, Toshio Sakakibara, Hiroki Nakamura, Toshiyuki Morishita, Takasumi Ooyanagi, Atsuo Watanabe
  • Patent number: 7763504
    Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: July 27, 2010
    Assignees: DENSO CORPORATION, Hitachi, Ltd.
    Inventors: Rajesh Kumar, Tsuyoshi Yamamoto, Hiroki Nakamura, Toshiyuki Morishita, Takasumi Ohyanagi, Atsuo Watanabe
  • Publication number: 20100183157
    Abstract: In an audio signal reproduction device and an audio signal reproduction system of the present invention, an SLch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5a, 5d located at Lch and SBLch speaker positions, and an SRch sound is reproduced as a mixed sound that is adjusted appropriately by two speakers 5b, 5e located at Rch and SBRch speaker positions. This configuration can achieve 5.1 ch virtual reproduction with high sound quality in which sounds for 5.1 channels of LPCM 7.1 ch audio information included in the contents are output as they are and sounds for the remaining 2 channels are reproduced artificially even if speakers compatible with the 5.1 ch sound field system are connected.
    Type: Application
    Filed: May 23, 2008
    Publication date: July 22, 2010
    Applicant: Panasonic Corporation
    Inventor: Atsuo Watanabe
  • Patent number: 7759975
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: July 20, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 7704350
    Abstract: A press belt (2) comprises both-end corresponding regions B positioned so as to correspond to both ends of a press roll (1) or a press shoe (3) in a width direction and having a small thickness and a center region A positioned between the both-end corresponding regions B and having a thickness larger than that of the both-end corresponding region B.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: April 27, 2010
    Assignee: Yamauchi Corporation
    Inventors: Takahisa Hikita, Atsuo Watanabe
  • Patent number: 7663181
    Abstract: A semiconductor device includes a vertical field-effect transistor having a substrate of first conduction type in a substrate base, a drain electrode formed on a first surface of the substrate, an epitaxial layer of first conduction type formed on a second surface of the substrate, a source region of first conduction type formed on the semiconductor base, a source ohmic contact metal film in ohmic contact with the source region, trenches formed from the second surface of the semiconductor base, and a gate region of second conduction type formed along the trenches. The semiconductor device further includes a gate rise metal film in ohmic contact with the draw-out layer of the gate region on the bottom of the trenches and rising to the second surface of the semiconductor base, and a gate draw-out metal film connected to the gate rise metal film from the second surface of the semiconductor base.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: February 16, 2010
    Assignees: Hitachi, Ltd., Denso Corporation
    Inventors: Takasumi Ohyanagi, Atsuo Watanabe, Toshio Sakakibara, Tsuyoshi Yamamoto, Hiroki Nakamura
  • Publication number: 20090115506
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Application
    Filed: December 29, 2008
    Publication date: May 7, 2009
    Applicant: HITACHI, LTD.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 7527583
    Abstract: A paper machine press roll comprises a core roll and a ceramics sprayed film formed on an outer periphery of the core roll, in which values of Rk and Vo which are characteristic evaluation parameters of a plateau-structure surface of the ceramics sprayed film are Rk?8.0 ?m and Vo?0.030 mm3/cm2. (Vo=(100?Mr2)×Rvk/2000 (mm3/cm2) where Rk, Mr2 and Rvk are a core level difference, a core load length ratio and a projecting valley depth, respectively which are defined in JIS B0671-2-2002 (ISO13565-2-1996).
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: May 5, 2009
    Assignee: Yamauchi Corporation
    Inventor: Atsuo Watanabe
  • Patent number: 7522692
    Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: April 21, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Patent number: 7479804
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: January 20, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Publication number: 20090016539
    Abstract: For achieving an audio reproduction with high sound quality, in a multi-channel A/V amplifier, front speakers are driven with a parallel-drive bi-amplifier arrangement upon stereo reproduction. In the case of the multi-channel reproduction mode, the switching circuit allows an output signal of each channel of the decoder to be sent to speakers via amplifiers for each channel in one-to-one correspondence. On the other hand, in the case of the 2-channel stereo reproduction mode, the switching circuit allows at least two amplifiers among the plurality of amplifiers to be connected in parallel between the output signal for each of the channels L and R of the decoder and the speakers for each of the channels L and R, and also allows the timing of the output signals of the respective amplifiers to be varied.
    Type: Application
    Filed: February 23, 2006
    Publication date: January 15, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Atsuo Watanabe
  • Publication number: 20080237631
    Abstract: In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region formed by an element active layer, both high integration and high breakdown voltage are realized while also securing suitability for practical implementation and practical use. The high breakdown voltage is realized without hampering size reduction of the element by forming an electrically floating layer of a conductivity type opposite to that of the drain region at the surface of the drain region. Further, the thickness of the embedded oxide layer is reduced to a level suitable for the practical implementation and practical use by setting the thickness of the element active layer of the SOI substrate at 30 ?m or more.
    Type: Application
    Filed: February 8, 2008
    Publication date: October 2, 2008
    Inventor: Atsuo WATANABE