Abstract: A papermaking belt which prevents cracking and inhibits crack growth which includes a reinforcing substrate embedded in a thermosetting polyurethane layer so that the reinforcing substrate and the thermosetting polyurethane layer are integrated with each other and the outer peripheral surface and the inner peripheral surface of the belt are formed by polyurethane layers, the polyurethane layer forming the outer peripheral surface being made of a composition containing a urethane prepolymer having isocyanate groups on its ends and a hardener containing dimethylthiotoluenediamine.

Abstract: A resin roll (1) comprises a lower winding layer (3) comprising a fiber-reinforced resin formed on an outer periphery of a roll core (2), and an outer sleeve (5) comprising a synthetic resin formed on the outside through an adhesive layer (4). A non-woven fiber aggregate layer (8) which constitutes an outer periphery of the lower winding layer (3) is formed such that a tape-shaped non-woven fiber aggregate in which a fiber material mainly comprising inorganic fibers is coupled with a binder is sequentially transferred and the non-woven fiber aggregate is impregnated with a liquid thermosetting resin and wound around the outer periphery of the roll core (2).

Abstract: A MOS field effect transistor. A field relaxation layer of a gate overlap structure is disposed in contact with a drain region for the purpose of relaxation of the electric field by increasing a distance between the field relaxation layer and a high-density layer. The electric field relaxation can further be promoted because the equipotential lines are bent by a gate insulation film. A punch-through stopper layer of a gate overlap structure is disposed in contact with a source region for suppressing spreading of a depletion layer toward the source region. The length of a gate electrode can be realized in a miniaturized size.

Abstract: A semiconductor device includes (a) a vertical field effect transistor, the vertical field effect transistor including a drain electrode formed on a first surface of a first conductivity type of a semiconductor, a pair of first trenches formed from a second surface of the semiconductor, control regions of a second conductivity type formed respectively along the first trenches, a source region of the first conductivity type formed along the second surface of the semiconductor between the first trenches, a source electrode joined to the source region, and a gate electrode adjacent to the control regions, (b) a pair of second trenches formed from the second surface of the semiconductor independently of the field effect transistor, (c) control regions of the second conductivity type formed along the second trenches, and (d) a diode having a junction formed on the second surface between the second trenches.

Abstract: A semiconductor device includes a vertical field-effect transistor having a substrate of first conduction type in a substrate base, a drain electrode formed on a first surface of the substrate, an epitaxial layer of first conduction type formed on a second surface of the substrate, a source region of first conduction type formed on the semiconductor base, a source ohmic contact metal film in ohmic contact with the source region, trenches formed from the second surface of the semiconductor base, and a gate region of second conduction type formed along the trenches. The semiconductor device further includes a gate rise metal film in ohmic contact with the draw-out layer of the gate region on the bottom of the trenches and rising to the second surface of the semiconductor base, and a gate draw-out metal film connected to the gate rise metal film from the second surface of the semiconductor base.

Abstract: A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.

Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.

Abstract: An electrical actuator comprises two or more electrical motors to drive a threaded screw ram. Each motor has an armature that drives a threaded roller screw that is engaged to the threaded screw ram. Each armature of each motor is independently engageable and/or dis-engageable with the ram. The motor armatures are engageable and disengageable by way of threaded roller screws, the ends of which are tapered to enable them to be lifted away from or lowered into engagement with the threaded ram.

Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Abstract: A semiconductor switching device for an inverter includes a first conductivity type, low impurity concentration, semiconductor substrate having a band gap equal to or greater than 2.0 eV, a first conductivity type first region formed in a first plane of the substrate having a resistance lower than the substrate, a first electrode formed in another plane of the first region, a first conductivity type second region formed in a second plane of the substrate, and a second electrode formed on the second region. A trench is formed in the second plane, a control region is formed from a bottom of the trench into the substrate and a control electrode of a different conductivity type is formed on the control region. The second electrode is formed over the control electrode through an insulator film, and the control electrode is formed on the trench sidewalls so the control region contacts the second region.

Abstract: A paper machine press roll comprises a core roll and a ceramics sprayed film formed on an outer periphery of the core roll, in which values of Rk and Vo which are characteristic evaluation parameters of a plateau-structure surface of the ceramics sprayed film are Rk?8.0 ?m and Vo?0.030 mm3/cm2. (Vo=(100?Mr2)×Rvk/2000 (mm3/cm2) where Rk, Mr2 and Rvk are a core level difference, a core load length ratio and a projecting valley depth, respectively which are defined in JIS B0671-2-2002 (ISO13565-2-1996).

Abstract: A sensor with built-in circuits can be improved in the stability of the operation or characteristics. A circuit region and a sensor region are covered by a passivation film. The sensor region is partially covered by the passivation film. The sensor region and circuit region are protected by the passivation film, and an effect of the passivation film on the mechanical displacement of a diaphragm portion can be alleviated so that the sensor with built-in circuits may be improved in the stability of the operation or characteristics.

Abstract: A papermaking belt of improved durability capable of preventing a crack from progressing into the which includes a reinforcing substrate embedded in an elastic material, and the elastic material containing a surface layer, a back layer and an intermediate layer located between the surface layer and the back layer and having a thick part containing a thickness in the belt thickness direction along the belt traveling direction in the said intermediate layer. The thick part can also be exposed on the belt surface through the surface layer, the thick part is preferably made of a low-hardness elastic material and the surface layer is preferably made of a high-hardness elastic material.

Abstract: A semiconductor device includes a trench formed on a source side of a drift region, a p-type gate region and a gate formed at the bottom of the trench, and the source formed over the entire surface of the unit device through an insulating film. The narrowest portion of a channel of the device is deeper than one-half the junction depth of the p-type gate region. This allows the width of the channel on the drain side to be reduced even when a lower energy ion implantation manufacturing process is used.

Abstract: The object of the present invention is to propose an etch channel sealing structure characterized by excellent impermeability to moisture and resistance to temporal change of the diaphragm in the pressure sensor produced according to the sacrificial layer etching technique, and to provide a pressure sensor characterized by excellent productivity and durability. After a very small gap is formed by the sacrificial layer etching technique, silicon oxide film is deposited by the CVD technique or the like, there by sealing the etch channel. Further, impermeable thin film of polysilicon or the like is formed to cover the oxide film. This allows an etch channel sealing structure to be simplified in the pressure sensor produced according to the sacrificial layer etching technique, and prevents entry of moisture into the cavity, thereby improving moisture resistance. Moreover, sealing material with small film stress reduces temporal deformation of the diaphragm.

Abstract: An N-channel MOS field-effect transistor on an SOI substrate including a source electrode, drain and gate electrodes both disposed via a field oxide film, a gate oxide film, a high concentration P-type layer, a high concentration N-type layer contacting the source electrode and the gate oxide film, a high concentration N-type layer contacting the drain electrode, a p-body layer contacting the high concentration P-type and N-type layers and the gate oxide film. In this transistor, an N-type layer with a concentration higher than that of a drain region contacting the p-body layer constitutes a region covering at most 95% of the source-drain distance. Further, an N-type region having a concentration from 3×1016/cm3 to 1×1022/cm3 is provided near a buried oxide film under the drain electrode.

Abstract: A structure is provided that ensures a low on-resistance and a better blocking effect. In a lateral type SIT (Static Induction Transistor) in which a first region is used as a p+ gate and a gate electrode is formed on the bottom of the first region, the structure is built such that the p+ gate and an n+ source are contiguous. An insulating film is formed on the surface of an n? channel, and an auxiliary gate electrode is formed on the insulating film. In addition, the auxiliary gate electrode and the source electrode are shorted.

Abstract: A structure is provided that ensures a low on-resistance and a better blocking effect. In a lateral type SIT (Static Induction Transistor) in which a first region is used as a p+ gate and a gate electrode is formed on the bottom of the first region, the structure is built such that the p+ gate and an n+ source are contiguous. An insulating film is formed on the surface of an n? channel, and an auxiliary gate electrode is formed on the insulating film. In addition, the auxiliary gate electrode and the source electrode are shorted.

Abstract: The object of the present invention is to propose an etch channel sealing structure characterized by excellent impermeability to moisture and resistance to temporal change of the diaphragm in the pressure sensor produced according to the sacrificial layer etching technique, and to provide a pressure sensor characterized by excellent productivity and durability. After a very small gap is formed by the sacrificial layer etching technique, silicon oxide film is deposited by the CVD technique or the like, thereby sealing the etch channel. Further, impermeable thin film of polysilicon or the like is formed to cover the oxide film. This allows an etch channel sealing structure to be simplified in the pressure sensor produced according to the sacrificial layer etching technique, and prevents entry of moisture into the cavity, thereby improving moisture resistance. Moreover, sealing material with small film stress reduces temporal deformation of the diaphragm.

Abstract: A power IC for an automobile engine control unit incorporating at least one semiconductor device comprising an N-channel insulated-gate filed-effect transistor formed on an SOI substrate, having an N-type layer having a concentration higher than a concentration of an N-type layer in contact with a p-body layer contacting a gate oxide film of the transistor. The high concentration N-type layer is formed in a region covering at most 95% of the source-drain distance between the p-body layer and a drain electrode of the transistor in the silicon substrate over an interface of a buried oxide film, the silicon substrate being in contact with both the field oxide film and the high concentration N-type layer contacting the drain electrode.