Patents by Inventor Atsushi Hosokawa

Atsushi Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12218170
    Abstract: A photodetecting device includes a semiconductor substrate, a plurality of avalanche photodiodes each including a light receiving region disposed at a first principal surface side of the semiconductor substrate, the avalanche photodiodes being arranged two-dimensionally at the semiconductor substrate, and a through-electrode electrically connected to a corresponding light receiving region. The through-electrode is provided in a through-hole penetrating through the semiconductor substrate in an area where the plurality of avalanche photodiodes are arranged two-dimensionally. At the first principal surface side of the semiconductor substrate, a groove surrounding the through-hole is formed between the through-hole and the light receiving region adjacent to the through-hole.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: February 4, 2025
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi Ishida, Noburo Hosokawa, Terumasa Nagano, Takashi Baba
  • Publication number: 20250034051
    Abstract: A composite substrate including a metal substrate having a first surface and a second surface opposite to the first surface, a ceramic substrate, and a bonding member disposed on the first surface. The bonding member bonds the metal substrate and the ceramic substrate. The ceramic substrate includes a plurality of sections and a groove between sections of the plurality of sections adjacent to each other. The bonding member is present in the groove.
    Type: Application
    Filed: July 7, 2024
    Publication date: January 30, 2025
    Applicant: NICHIA CORPORATION
    Inventor: Atsushi HOSOKAWA
  • Publication number: 20240405176
    Abstract: A method includes providing a ceramic substrate having a first arrangement portion recessed from a first planar portion; disposing a first conductive paste containing a first metal powder in the first arrangement portion; obtaining a first conductor by firing the first conductive paste; forming first recessed portions on a surface of the first conductor disposed in the first arrangement portion by polishing the first conductor and the ceramic substrate so that the first conductor and the first surface form a same plane; disposing a second conductive paste containing a second metal powder and a second organic resin binder in the first recessed portions; obtaining a second conductor by curing the second conductive paste; polishing the second conductor so that the second conductor and the first conductor form the same plane; and forming a first metal layer on surfaces of the first conductor and the second conductor.
    Type: Application
    Filed: May 23, 2024
    Publication date: December 5, 2024
    Applicant: NICHIA CORPORATION
    Inventors: Atsushi HOSOKAWA, Masaaki KATSUMATA
  • Patent number: 12140228
    Abstract: A protective ring with an annular shape that is formed of an elastic member and is mounted in an annular groove formed in a butt adhesion surface of a first cylindrical member and a second cylindrical member includes a band-shaped ring body and a ridge protruding from a center of an inner surface in a width direction and pressed against the annular groove. The ridge is continuously formed such that a cross section of the ridge is semicircular-shaped and has a smaller diameter than a width of the ring body, and the width of the ring body is larger than a thickness of the protective ring in a radius direction.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: November 12, 2024
    Assignee: MITSUBISHI CABLE INDUSTRIES, LTD.
    Inventors: Tsuyoshi Takubo, Atsushi Hosokawa, Nobuyuki Hayashi
  • Publication number: 20240355987
    Abstract: A wiring substrate includes a base body, a metal member, and an insulating member. The base body is insulating and has a first surface and a second surface on an opposite side to the first surface. The base body includes a groove portion provided on a second surface side, and a through hole connecting the first surface and a bottom surface of the groove portion. The metal member is disposed in the groove portion on the bottom surface side of the groove portion and in the through hole away from an opening of the groove portion. The insulating member is disposed so as to close the opening of the groove portion.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 24, 2024
    Applicant: NICHIA CORPORATION
    Inventors: Masaaki KATSUMATA, Eiko MINATO, Takashi KAWAMATA, Atsushi HOSOKAWA
  • Publication number: 20240213427
    Abstract: A wiring substrate including a base body provided with a via hole, a conductive portion disposed in the via hole, and a wiring portion electrically connected to the conductive portion and disposed on a surface of the body. The conductive portion includes a first conductive member containing copper particles and a resin. The first member contains small-sized particles with a particle size from 0.1 ?m to 1.0 ?m and large-sized particles with a particle size from more than 1.0 ?m to 10 ?m. The wiring portion includes a second conductive member containing copper particles. The second member contains small-sized particles with a particle size from 0.1 ?m to 1.0 ?m and large-sized particles with a particle size from more than 1.0 ?m to 10 ?m. A weight proportion of the small-sized particles in the first member is lower than a weight proportion of the small-sized particles in the second member.
    Type: Application
    Filed: December 20, 2023
    Publication date: June 27, 2024
    Applicant: NICHIA CORPORATION
    Inventors: Atsushi HOSOKAWA, Masaaki KATSUMATA, Eiko MINATO
  • Patent number: 11948718
    Abstract: Inside a first case outer frame portion as an outer frame of the first case, a plurality of first core pieces and a partition to separate a pair of adjacent first core pieces among the plurality of first core pieces are disposed. The first case has a shape capable of accommodating at least a part of the second core piece. The first case outer frame portion includes a first case accommodating portion as a portion of the first case outer frame portion that is capable of accommodating the plurality of first core pieces, and a first case cover portion to cover a space inside the first case accommodating portion.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: April 2, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Atsushi Hosokawa, Takashi Kumagai, Tomohito Fukuda, Kenji Nishizaka, Shohei Higashitani
  • Publication number: 20240038957
    Abstract: A wiring substrate includes: a base body having an insulating property and including a first surface and a second surface on a side opposite the first surface; a resist portion covering at least part of the first surface and at least a part of the second surface of the base body and including a hole portion having a predetermined pattern; and a wiring line disposed in the hole portion of the resist portion so as to be in contact with the base body. In a cross-sectional view in a thickness direction of the base body, a length of an exposed surface of the wiring line exposed from the resist portion is less than a length of a contact surface of the wiring line in contact with the base body.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 1, 2024
    Applicant: NICHIA CORPORATION
    Inventors: Atsushi HOSOKAWA, Masaaki KATSUMATA
  • Publication number: 20230420269
    Abstract: A method of manufacturing a wiring substrate includes providing a conductive paste including metal nanoparticles, metal particles, and a resin, disposing the conductive paste on at least a first surface of an insulating base body, and forming a wiring layer by heating and pressurizing the conductive paste by using a roll press or a hard SUS plate. In the providing the conductive paste, the ratio of a mass of the metal nanoparticles to the total mass of the metal nanoparticles and the metal particles is in a range of 5 mass % to 95 mass %, and the conductive paste is heated and pressurized such that part of the wiring layer in a thickness direction is embedded in at least the first surface of the insulating base body.
    Type: Application
    Filed: June 27, 2023
    Publication date: December 28, 2023
    Applicant: NICHIA CORPORATION
    Inventors: Eiko MINATO, Masaaki KATSUMATA, Atsushi HOSOKAWA
  • Patent number: 11705442
    Abstract: According to one embodiment, a semiconductor device includes an integrated circuit (IC) chip and a silicon capacitor. The IC chip has a first terminal and a second terminal on a first surface. The silicon capacitor has a first electrode and a second electrode on a second surface facing the first surface. The first electrode is electrically connected to the first terminal through a first conductive member, and the second electrode is electrically connected to the second terminal through a second conductive member.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: July 18, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Atsushi Hosokawa, Yasuhisa Shintoku, Yasukazu Noine, Yoshiharu Katayama
  • Publication number: 20230167900
    Abstract: A protective ring with an annular shape that is formed of an elastic member and is mounted in an annular groove formed in a butt adhesion surface of a first cylindrical member and a second cylindrical member includes a band-shaped ring body and a ridge protruding from a center of an inner surface in a width direction and pressed against the annular groove. The ridge is continuously formed such that a cross section of the ridge is semicircular-shaped and has a smaller diameter than a width of the ring body, and the width of the ring body is larger than a thickness of the protective ring in a radius direction.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 1, 2023
    Applicant: MITSUBISHI CABLE INDUSTRIES, LTD.
    Inventors: Tsuyoshi TAKUBO, Atsushi HOSOKAWA, Nobuyuki HAYASHI
  • Publication number: 20220093321
    Abstract: A coil apparatus includes a coil unit including a coil, a base core that is a first core component, and a core module that is a second core component. The first core component includes a center leg that is a leg around which the coil is wound. The second core component includes a plurality of core segments arranged in a row with gaps between them. The second core component is connected to the leg to form a magnetic path together with the first core component.
    Type: Application
    Filed: February 3, 2020
    Publication date: March 24, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji NISHIZAKA, Takashi KUMAGAI, Tomohito FUKUDA, Atsushi HOSOKAWA
  • Publication number: 20220084995
    Abstract: According to one embodiment, a semiconductor device includes an integrated circuit (IC) chip and a silicon capacitor. The IC chip has a first terminal and a second terminal on a first surface. The silicon capacitor has a first electrode and a second electrode on a second surface facing the first surface. The first electrode is electrically connected to the first terminal through a first conductive member, and the second electrode is electrically connected to the second terminal through a second conductive member.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 17, 2022
    Inventors: Atsushi HOSOKAWA, Yasuhisa SHINTOKU, Yasukazu NOINE, Yoshiharu KATAYAMA
  • Patent number: 11264313
    Abstract: A semiconductor device includes a molded body and an interconnection layer. The molded body includes a semiconductor chip, at least one terminal body disposed around the semiconductor chip and a resin member provided between the semiconductor chip and the terminal body. The molded body has a first surface, a second surface opposite to the first surface and a side surface connected to the first and second surfaces. The interconnection layer is provided on the first surface of the molded body. The interconnection layer includes an interconnect electrically connecting the semiconductor chip and the terminal body. The terminal body has first and second contact surfaces. The first contact surface is exposed at the first or second surface of the molded body. The second contact surface is connected to the first contact surface and exposed at the side surface of the molded body.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: March 1, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akito Shimizu, Yasuhisa Shintoku, Yoshihisa Imori, Hiroaki Kishi, Atsushi Hosokawa, Tomohiko Imada, Shinya Shimamura
  • Publication number: 20210327630
    Abstract: Inside a first case outer frame portion as an outer frame of the first case, a plurality of first core pieces and a partition to separate a pair of adjacent first core pieces among the plurality of first core pieces are disposed. The first case has a shape capable of accommodating at least a part of the second core piece. The first case outer frame portion includes a first case accommodating portion as a portion of the first case outer frame portion that is capable of accommodating the plurality of first core pieces, and a first case cover portion to cover a space inside the first case accommodating portion.
    Type: Application
    Filed: September 11, 2019
    Publication date: October 21, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Atsushi HOSOKAWA, Takashi KUMAGAI, Tomohito FUKUDA, Kenji NISHIZAKA, Shohei HIGASHITANI
  • Publication number: 20200083150
    Abstract: A semiconductor device includes a molded body and an interconnection layer. The molded body includes a semiconductor chip, at least one terminal body disposed around the semiconductor chip and a resin member provided between the semiconductor chip and the terminal body. The molded body has a first surface, a second surface opposite to the first surface and a side surface connected to the first and second surfaces. The interconnection layer is provided on the first surface of the molded body. The interconnection layer includes an interconnect electrically connecting the semiconductor chip and the terminal body. The terminal body has first and second contact surfaces. The first contact surface is exposed at the first or second surface of the molded body. The second contact surface is connected to the first contact surface and exposed at the side surface of the molded body.
    Type: Application
    Filed: February 1, 2019
    Publication date: March 12, 2020
    Inventors: Akito Shimizu, Yasuhisa Shintoku, Yoshihisa Imori, Hiroaki Kishi, Atsushi Hosokawa, Tomohiko Imada, Shinya Shimamura
  • Patent number: 10347685
    Abstract: An optical device includes a substrate, a semiconductor chip, a resin member, and a transparent plate. The semiconductor chip is provided on the substrate, and an optically functional layer is formed in a part of a top portion of the semiconductor chip. The resin member is provided on the substrate with a top surface and an inner side surface, and has a frame shape surrounding the optically functional layer. The resin member is integrally formed from a resin material, and includes a recessed portion provided at the intersection of the top surface and the inner side surface. The transparent plate is disposed in the recessed portion. The semiconductor chip, the resin member, and the transparent plate are arranged to define airspace.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takao Egami, Atsushi Hosokawa
  • Publication number: 20180240839
    Abstract: An optical device includes a substrate, a semiconductor chip, a resin member, and a transparent plate. The semiconductor chip is provided on the substrate, and an optically functional layer is formed in a part of a top portion of the semiconductor chip. The resin member is provided on the substrate with a top surface and an inner side surface, and has a frame shape surrounding the optically functional layer. The resin member is integrally formed from a resin material, and includes a recessed portion provided at the intersection of the top surface and the inner side surface. The transparent plate is disposed in the recessed portion. The semiconductor chip, the resin member, and the transparent plate are arranged to define airspace.
    Type: Application
    Filed: September 8, 2017
    Publication date: August 23, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takao EGAMI, Atsushi HOSOKAWA
  • Patent number: 9512924
    Abstract: An inner peripheral surface (10C) of an elastic seal (10) having a U-shaped cross section and made of rubber is supported by a guide ring (20) having a flat cross-sectional shape and made of synthetic resin.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: December 6, 2016
    Assignee: MITSUBISHI CABLE INDUSTRIES, LTD.
    Inventors: Yasuji Uesugi, Atsushi Hosokawa
  • Publication number: 20120286478
    Abstract: An inner peripheral surface (10C) of an elastic seal (10) having a U-shaped cross section and made of rubber is supported by a guide ring (20) having a flat cross-sectional shape and made of synthetic resin.
    Type: Application
    Filed: January 11, 2011
    Publication date: November 15, 2012
    Applicant: MITSUBISHI CABLE INDUSTRIES, LTD.
    Inventors: Yasuji Uesugi, Atsushi Hosokawa