Patents by Inventor Aya Miki

Aya Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190390076
    Abstract: A dispersion contains, as essential ingredients, light-emitting nanocrystals, a polymeric dispersant having an amine value of 5 mg/KOH g or more, and a stimulation-responsive curable material that cures in response to an external stimulus.
    Type: Application
    Filed: December 21, 2017
    Publication date: December 26, 2019
    Applicant: DIC Corporation
    Inventors: Takeshi Isonaka, Yasuo Umezu, Hidehiko Yamaguchi, Yoshio Aoki, Hirotomo Sasaki, Sunao Yoshihara, Takayuki Miki, Aya Ishizuka, Takeo Kizaki
  • Patent number: 10468535
    Abstract: Disclosed is an oxide for a semiconductor layer of a thin film transistor, which, when used in a thin film transistor that includes an oxide semiconductor in the semiconductor layer, imparts good switching characteristics and stress resistance to the transistor. Specifically disclosed is an oxide for a semiconductor layer of a thin film transistor, which is used for a semiconductor layer of a thin film transistor and contains at least one element selected from the group consisting of In, Ga and Zn and at least one element selected from the group X consisting of Al, Si, Ni, Ge, Sn, Hf, Ta and W.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: November 5, 2019
    Assignee: Kobe Steel, Ltd.
    Inventors: Shinya Morita, Toshihiro Kugimiya, Takeaki Maeda, Satoshi Yasuno, Yasuaki Terao, Aya Miki
  • Patent number: 10256091
    Abstract: The oxide of the present invention for thin-film transistors is an In—Zn—Sn-based oxide containing In, Zn, and Sn, wherein when the respective contents (atomic %) of metal elements contained in the In—Zn—Sn-based oxide are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide fulfills the following expressions (2) and (4) when [In]/([In]+[Sn])?0.5; or the following expressions (1), (3), and (4) when [In]/([In]+[Sn])>0.5. [In]/([In]+[Zn]+[Sn])?0.3??(1), [In]/([In]+[Zn]+[Sn])?1.4×{[Zn]/([Zn]+[Sn])}?0.5??(2), [Zn]/([In]+[Zn]+[Sn])?0.83??(3), and 0.1?[In]/([In]+[Zn]+[Sn])??(4). According to the present invention, oxide thin films for thin-film transistors can be obtained, which provide TFTs with excellent switching characteristics, and which have high sputtering rate in the sputtering and properly controlled etching rate in the wet etching.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: April 9, 2019
    Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.
    Inventors: Hiroaki Tao, Aya Miki, Shinya Morita, Satoshi Yasuno, Toshihiro Kugimiya, Jae Woo Park, Je Hun Lee, Byung Du Ahn, Gun Hee Kim
  • Patent number: 10203367
    Abstract: Provided is a method for simply evaluating defects caused in interface states in oxide semiconductor thin films and protective films in TFTs having protective films formed on the surface of oxide semiconductor thin films without actually measuring the characteristics of the same. This evaluation method evaluates defects caused in the interface states by measuring electron states in the oxide semiconductor thin film by a contact method or noncontact method. The defects caused in the interface states are any of the following: (1) threshold value voltage (Vth) when a positive bias is applied to the thin-film transistor, (2) difference in threshold value voltage (?Vth) before and after applying the positive bias to the thin-film transistor, and (3) threshold value during the first measurement when a plurality of measurements is made of the threshold value voltage when a positive bias is applied to the thin-film transistor.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: February 12, 2019
    Assignee: Kobe Steel, Ltd.
    Inventors: Kazushi Hayashi, Aya Miki, Nobuyuki Kawakami
  • Patent number: 9816944
    Abstract: The present invention provides a method for accurately and easily measuring/evaluating/predicting/estimating the electrical resistance of an oxide semiconductor thin film, and a method for managing the film quality. The method for evaluating an oxide semiconductor thin film includes: a first step for irradiating, with excitation light and microwave, a sample on which an oxide semiconductor thin film is formed, measuring the maximum value of the reflected microwave by the thin film which changes due to the excitation light irradiation, then stopping the excitation light irradiation and measuring the change in reflectivity of the microwave from the thin film after the excitation light irradiation has been stopped; and a second step for calculating a parameter corresponding to the slow decay observed after the excitation light irradiation has been stopped from the change in the reflectivity and evaluating the electrical resistivity of the oxide semiconductor thin film.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: November 14, 2017
    Assignee: Kobe Steel, Ltd.
    Inventors: Kazushi Hayashi, Aya Miki, Toshihiro Kugimiya, Nobuyuki Kawakami
  • Publication number: 20170184660
    Abstract: Provided is a method for simply evaluating defects caused in interface states in oxide semiconductor thin films and protective films in TFTs having protective films formed on the surface of oxide semiconductor thin films without actually measuring the characteristics of the same. This evaluation method evaluates defects caused in the interface states by measuring electron states in the oxide semiconductor thin film by a contact method or noncontact method. The defects caused in the interface states are any of the following (1)-(3). (1) Threshold value voltage (Vth,) when a positive bias is applied to the thin-film transistor (2) Difference in threshold value voltage (?Vth) before and after applying the positive bias to the thin-film transistor (3) Threshold value during the first measurement when a plurality of measurements is made of the threshold value voltage when a positive bias is applied to the thin-film transistor.
    Type: Application
    Filed: June 22, 2015
    Publication date: June 29, 2017
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Kazushi HAYASHI, Aya MIKI, Nobuyuki KAWAKAMI
  • Publication number: 20170170029
    Abstract: This thin film transistor has a gate electrode, a gate insulating film, an oxide semiconductor thin film, an etch stop layer for protecting the oxide semiconductor thin film, a source and drain electrodes, and a passivation film in this order on a substrate. The oxide semiconductor thin film is formed of an oxide configured from In, Ga and Sn as metal elements, and O, and has an amorphous structure, and the etch stop layer and/or the passivation film includes SiNx. The thin film transistor has an extremely high mobility of approximately 40 cm2/Vs or more.
    Type: Application
    Filed: August 6, 2015
    Publication date: June 15, 2017
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO(KOBE STEEL, LTD.)
    Inventors: Mototaka OCHI, Yasuyuki TAKANASHI, Aya MIKI, Hiroshi GOTO, Toshihiro KUGIMIYA
  • Patent number: 9647126
    Abstract: Provided is an oxide semiconductor configured to be used in a thin film transistor having high field-effect mobility; a small shift in threshold voltages against light and bias stress; excellent stress resistance. The oxide semiconductor has also excellent resistance to a wet-etchant for patterning of a source-drain electrode. The oxide semiconductor comprises In, Zn, Ga, Sn and O, and satisfies the requirements represented by expressions (1) to (4) shown below, wherein [In], [Zn], [Ga], and [Sn] represent content (in atomic %) of each of the elements relative to the total content of all the metal elements other than oxygen in the oxide. (1.67×[Zn]+1.67×[Ga])?100??(1) {([Zn]/0.95)+([Sn]/0.40)+([In]/0.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: May 9, 2017
    Assignee: Kobe Steel, Ltd.
    Inventors: Shinya Morita, Kenta Hirose, Aya Miki, Toshihiro Kugimiya
  • Patent number: 9640556
    Abstract: Provided is a thin film transistor that has high mobility and excellent stress resistance and is good typically in adaptability to wet etching process. The thin film transistor includes a substrate, and, disposed on the substrate in the following sequence, a gate electrode, a gate insulator film, oxide semiconductor layers, source-drain electrodes, and a passivation film that protects the source-drain electrodes. The oxide semiconductor layers have a first oxide semiconductor layer including In, Ga, Zn, Sn, and O, and a second oxide semiconductor layer including In, Ga, Sn, and O. The second oxide semiconductor layer is disposed on the gate insulator film. The first oxide semiconductor layer is disposed between the second oxide semiconductor layer and the passivation film. The atomic ratios in contents of the individual metal elements to all the metal elements constituting the first and the second oxide semiconductor layers are controlled to predetermined ratios.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: May 2, 2017
    Assignee: Kobe Steel, Ltd.
    Inventors: Hiroshi Goto, Aya Miki, Mototaka Ochi
  • Publication number: 20170053800
    Abstract: The oxide of the present invention for thin-film transistors is an In—Zn—Sn-based oxide containing In, Zn, and Sn, wherein when the respective contents (atomic %) of metal elements contained in the In—Zn—Sn-based oxide are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide fulfills the following expressions (2) and (4) when [In]/([In]+[Sn])?0.5; or the following expressions (1), (3), and (4) when [In]/([In]+[Sn])>0.5. [In]/([In]+[Zn]+[Sn])?0.3 - - - (1), [In]/([In]+[Zn]+[Sn])?1.4×{[Zn]/([Zn]+[Sn])}?0.5 - - - (2), [Zn]/([In]+[Zn]+[Sn])?0.83 - - - (3), and 0.1?[In]/([In]+[Zn]+[Sn]) - - - (4). According to the present invention, oxide thin films for thin-film transistors can be obtained, which provide TFTs with excellent switching characteristics, and which have high sputtering rate in the sputtering and properly controlled etching rate in the wet etching.
    Type: Application
    Filed: October 11, 2016
    Publication date: February 23, 2017
    Applicants: KABUSHIKI KAISHA KOBE SEIKO SHO (Kobe Steel, Ltd.), Samsung Display Co., Ltd.
    Inventors: Hiroaki TAO, Aya MIKI, Shinya MORITA, Satoshi YASUNO, Toshihiro KUGIMIYA, Jae Woo PARK, Je Hun LEE, Byung Du AHN, Gun Hee KIM
  • Patent number: 9553201
    Abstract: The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: January 24, 2017
    Assignees: Samsung Display Co., Ltd., Kobe Steel, Ltd.
    Inventors: Byung Du Ahn, Ji Hun Lim, Gun Hee Kim, Kyoung Won Lee, Je Hun Lee, Hiroshi Goto, Aya Miki, Shinya Morita, Toshihiro Kugimiya, Yeon Hong Kim, Yeon Gon Mo, Kwang Suk Kim
  • Patent number: 9508856
    Abstract: Provided is a thin film transistor wherein the shape of a protrusion formed on the interface between an oxide semiconductor layer and a protection film is suitably controlled, and stable characteristics are achieved. This thin film transistor is characterized in that: the thin film transistor has an oxide semiconductor layer formed of an oxide containing at least In, Zn and Sn as metal elements, and a protection film directly in contact with the oxide semiconductor layer; and the maximum height of a protrusion formed on the oxide semiconductor layer surface directly in contact with the protection film is less than 5 nm.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: November 29, 2016
    Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.
    Inventors: Hiroaki Tao, Takeaki Maeda, Aya Miki, Toshihiro Kugimiya, Byung Du Ahn, So Young Koo, Gun Hee Kim
  • Publication number: 20160329353
    Abstract: Provided is a thin film transistor that has high mobility and excellent stress resistance and is good typically in adaptability to wet etching process. The thin film transistor includes a substrate, and, disposed on the substrate in the following sequence, a gate electrode, a gate insulator film, oxide semiconductor layers, source-drain electrodes, and a passivation film that protects the source-drain electrodes. The oxide semiconductor layers have a first oxide semiconductor layer including In, Ga, Zn, Sn, and O, and a second oxide semiconductor layer including In, Ga, Sn, and O. The second oxide semiconductor layer is disposed on the gate insulator film. The first oxide semiconductor layer is disposed between the second oxide semiconductor layer and the passivation film. The atomic ratios in contents of the individual metal elements to all the metal elements constituting the first and the second oxide semiconductor layers are controlled to predetermined ratios.
    Type: Application
    Filed: January 15, 2015
    Publication date: November 10, 2016
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO(KOBE STELL, LTD)
    Inventors: Hiroshi GOTO, Aya MIKI, Mototaka OCHI
  • Publication number: 20160282284
    Abstract: The present invention provides a method for accurately and easily measuring/evaluating/predicting/estimating the electrical resistance of an oxide semiconductor thin film, and a method for managing the film quality. The method for evaluating an oxide semiconductor thin film includes: a first step for irradiating, with excitation light and microwave, a sample on which an oxide semiconductor thin film is formed, measuring the maximum value of the reflected microwave by the thin film which changes due to the excitation light irradiation, then stopping the excitation light irradiation and measuring the change in reflectivity of the microwave from the thin film after the excitation light irradiation has been stopped; and a second step for calculating a parameter corresponding to the slow decay observed after the excitation light irradiation has been stopped from the change in the reflectivity and evaluating the electrical resistivity of the oxide semiconductor thin film.
    Type: Application
    Filed: December 1, 2014
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Kazushi HAYASHI, Aya MIKI, Toshihiro KUGIMIYA, Nobuyuki KAWAKAMI
  • Patent number: 9449990
    Abstract: Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: September 20, 2016
    Assignees: KOBE STEEL, LTD., Samsung Display Co., Ltd.
    Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Hiroaki Tao, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Jin Hyun Park, Yeon Hong Kim
  • Patent number: 9362313
    Abstract: Provided is an oxide-semiconductor-based thin film transistor having satisfactory switching characteristics and stress resistance. Change in threshold voltage through stress application is suppressed in the thin film transistor. The thin film transistor of excellent stability comprises a substrate and, formed thereon, at least a gate electrode, a gate insulating film, oxide semiconductor layers, a source-drain electrode, and a passivation film for protecting the gate insulating film, and oxide semiconductor layers, wherein the oxide semiconductor layers are laminated layers comprising a second oxide semiconductor layer consisting of In, Zn, Sn, and O and a first oxide semiconductor layer consisting of In, Ga, Zn, and O. The second oxide semiconductor layer is formed on the gate insulating film. The first oxide semiconductor layer is interposed between the second oxide semiconductor layer and the passivation film.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: June 7, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Shinya Morita, Aya Miki, Hiroaki Tao, Toshihiro Kugimiya
  • Patent number: 9343586
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 5% or more; In: 25% or less (excluding 0%); Zn: 35 to 65%; and Sn: 8 to 30%.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: May 17, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya
  • Patent number: 9324882
    Abstract: A thin film transistor containing at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate containing a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 8% or more and 30% or less; In: 25% or less, excluding 0%; Zn: 35% or more to 65% or less; and Sn: 5% or more to 30% or less.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: April 26, 2016
    Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.
    Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Yeon Hong Kim
  • Patent number: 9316589
    Abstract: This method for evaluating an oxide semiconductor thin film includes evaluating the stress stability of an oxide semiconductor thin film on the basis of the light emission intensity of luminescent light excited when radiating an electron beam or excitation light at a sample at which the oxide semiconductor thin film is formed. The stress stability of the oxide semiconductor thin film is evaluated on the basis of the light emission intensity (L1) observed in the range of 1.6-1.9 eV of the luminescent light excited from the oxide semiconductor thin film.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: April 19, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Kazushi Hayashi, Toshihiro Kugimiya, Tomoya Kishi, Aya Miki
  • Patent number: 9318507
    Abstract: Provided is a thin film transistor comprising an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with: a gate electrode; two or more oxide semiconductor layers that are used as a channel layer; an etch stopper layer for protecting the surfaces of the oxide semiconductor layers; a source-drain electrode; and a gate insulator film interposed between the gate electrode and the channel layer. The metal elements constituting an oxide semiconductor layer that is in direct contact with the gate insulator film are In, Zn and Sn. The hydrogen concentration in the gate insulator film, which is in direct contact with the oxide semiconductor layer, is controlled to 4 atomic % or less.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: April 19, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Hiroaki Tao, Toshihiro Kugimiya