Patents by Inventor Ayose Falcon

Ayose Falcon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11281965
    Abstract: A processing device includes a processor core and a number of calculation modules that each is configurable to perform any one of operations for a convolutional neuron network system. A first set of the calculation modules are configured to perform convolution operations, a second set of the calculation modules are reconfigured to perform averaging operations, and a third set of the calculation modules are reconfigured to perform dot product operations.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Marc Lupon, Enric Herrero Abellanas, Ayose Falcon, Fernando Latorre, Pedro Lopez, Frederico Pratas
  • Publication number: 20180349763
    Abstract: A processing device includes a processor core and a number of calculation modules that each is configurable to perform any one of operations for a convolutional neuron network system. A first set of the calculation modules are configured to perform convolution operations, a second set of the calculation modules are reconfigured to perform averaging operations, and a third set of the calculation modules are reconfigured to perform dot product operations.
    Type: Application
    Filed: April 5, 2018
    Publication date: December 6, 2018
    Inventors: Marc Lupon, Enric Herrero Abellanas, Ayose Falcon, Fernando Latorre, Pedro Lopez, Frederico Pratas
  • Patent number: 9978014
    Abstract: A processing device includes a processor core and a number of calculation modules that each is configurable to perform any one of operations for a convolutional neuron network system. A first set of the calculation modules are configured to perform convolution operations, a second set of the calculation modules are reconfigured to perform averaging operations, and a third set of the calculation modules are reconfigured to perform dot product operations.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: May 22, 2018
    Assignee: Intel Corporation
    Inventors: Marc Lupon, Enric Herrero Abellanas, Ayose Falcon, Fernando Latorre, Pedro Lopez, Frederico Pratas
  • Publication number: 20150170021
    Abstract: A processing device includes a processor core and a number of calculation modules that each is configurable to perform any one of operations for a convolutional neuron network system. A first set of the calculation modules are configured to perform convolution operations, a second set of the calculation modules are reconfigured to perform averaging operations, and a third set of the calculation modules are reconfigured to perform dot product operations.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Inventors: Marc Lupon, Enric Herrero Abellanas, Ayose Falcon, Fernando Latorre, Pedro Lopez, Frederico Pratas
  • Patent number: 8392168
    Abstract: One example embodiment is a method that simulates a sampling period of an application to collect execution counts of basic blocks and compute cycles per instruction (CPI) data. A non-sampling period of the application is simulated to collect execution counts of basic blocks, and a comparison of the execution counts collected during the sampling period is performed to the execution counts collected during the non-sampling period. Based on the comparison, a determination is made whether to estimate CPI for the basic blocks during the non-sampling period using the CPI data collected during the sampling period.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ayose Falcon Samper, Paolo Faraboschi
  • Patent number: 8291488
    Abstract: Upon an intermediary device on a network being turned on, controlling system software at the intermediary device is booted such that no public network address is ever assigned to the intermediary device. The intermediary device sends a boot message over the network to central authority software running on one or more first computing devices on the network. The central authority software in response sends messages over the network to the intermediary device and to a second computing device on the network to establish a private tunnel with one another. The intermediary device and the second computing device establish the private tunnel with one another over the network. The intermediary device then opens a remote connection to the second computing device through the private tunnel so that peripherals connected to the intermediary device as if they were directly connected to the second computing device.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: October 16, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Patent number: 8126696
    Abstract: Nodes interconnected by a network have their substantially parallel execution simulated. Substantially parallel execution of the nodes during a current quantum of simulation time having a quantum length is simulated. Simulation of execution can result in simulation of inter-node data packets being transmitted over the network. When the current quantum of simulation time has elapsed, simulation of execution of the nodes is synchronized. If no inter-node data packets were transmitted in simulation during the current quantum of simulation time, then the quantum length is increased. If one or more inter-node data packets were transmitted in simulation during the current quantum of simulation time, then the quantum length is decreased. This process is then repeated for a next quantum of simulation time having the quantum length as has been increased or decreased.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: February 28, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon Samper
  • Publication number: 20110106519
    Abstract: One example embodiment is a method that simulates a sampling period of an application to collect execution counts of basic blocks and compute cycles per instruction (CPI) data. A non-sampling period of the application is simulated to collect execution counts of basic blocks, and a comparison of the execution counts collected during the sampling period is performed to the execution counts collected during the non-sampling period. Based on the comparison, a determination is made whether to estimate CPI for the basic blocks during the non-sampling period using the CPI data collected during the sampling period.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 5, 2011
    Inventors: Ayose Falcon Samper, Paolo Faraboschi
  • Patent number: 7912690
    Abstract: A method for simulating a system normally performs functional simulation of the system without performing timing simulation of the system. The method dynamically samples the functional simulation of the system at intervals to determine whether the functional simulation has entered into a new phase. Where the functional simulation has entered into a new phase, the method performs both the functional simulation and the timing simulation of the system for one or more intervals.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: March 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ayose Falcon, Paolo Faraboschi, Daniel Ortega
  • Publication number: 20090282234
    Abstract: Upon an intermediary device on a network being turned on, controlling system software at the intermediary device is booted such that no public network address is ever assigned to the intermediary device. The intermediary device sends a boot message over the network to central authority software running on one or more first computing devices on the network. The central authority software in response sends messages over the network to the intermediary device and to a second computing device on the network to establish a private tunnel with one another. The intermediary device and the second computing device establish the private tunnel with one another over the network. The intermediary device then opens a remote connection to the second computing device through the private tunnel so that peripherals connected to the intermediary device as if they were directly connected to the second computing device.
    Type: Application
    Filed: June 26, 2007
    Publication date: November 12, 2009
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Patent number: 7555419
    Abstract: Instructions to be executed on a system are simulated. Representative simulation phases of the instructions, which most affect simulation results of the instructions to be executed on the system, are dynamically determined. For each representative simulation phase of the instructions, a model is selected from a number of models that provides specified accuracy with a minimal amount of simulation time, and the representative simulation phase is simulated using the model selected. The simulation results for the instructions to be executed on the system are then output.
    Type: Grant
    Filed: July 23, 2006
    Date of Patent: June 30, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon
  • Publication number: 20080270959
    Abstract: A method performs functional simulation of a system as influenced by timing simulation of the system. The method performs functional simulation of a system, and periodically performs timing simulation of the system. The functional simulation of the system takes into account the timing simulation of the system that is periodically performed.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Publication number: 20080270952
    Abstract: A method for simulating a system normally performs functional simulation of the system without performing timing simulation of the system. The method dynamically samples the functional simulation of the system at intervals to determine whether the functional simulation has entered into a new phase. Where the functional simulation has entered into a new phase, the method performs both the functional simulation and the timing simulation of the system for one or more intervals.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Inventors: Ayose Falcon, Paolo Faraboschi, Daniel Ortega
  • Publication number: 20080126071
    Abstract: Instructions to be executed on a system are simulated. Representative simulation phases of the instructions, which most affect simulation results of the instructions to be executed on the system, are dynamically determined. For each representative simulation phase of the instructions, a model is selected from a number of models that provides specified accuracy with a minimal amount of simulation time, and the representative simulation phase is simulated using the model selected. The simulation results for the instructions to be executed on the system are then output.
    Type: Application
    Filed: July 23, 2006
    Publication date: May 29, 2008
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon
  • Publication number: 20060036837
    Abstract: A hybrid prophet/critic predictor includes a first branch predictor to provide a first branch prediction for a branch under prediction (BUP) based on a branch history of the BUP and/or a program counter, and also includes a second branch predictor to provide a second branch prediction for the BUP based on a branch future of the BUP.
    Type: Application
    Filed: August 13, 2004
    Publication date: February 16, 2006
    Inventors: Jared Stark, Ayose Falcon-Samper