Patents by Inventor Babak S. Sani

Babak S. Sani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8936985
    Abstract: A method can include forming a drift region, forming a well region above the drift region, and forming an active trench extending through the well region and into the drift region. The method can include forming a first source region in contact with a first sidewall of the active trench and a second source region in contact with a second sidewall of the active trench. The method also includes forming a charge control trench where the charge control trench is aligned parallel to the active trench and laterally separated from the active trench by a mesa region, and where the portion of the well region is in contact with the charge control trench and excludes any source region. The method also includes forming an oxide along a bottom of the active trench having a thickness greater than a thickness of an oxide along the first sidewall of the active trench.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: January 20, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ashok Challa, Alan Elbanhawy, Dean E. Probst, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Becky Losee, Robert Herrick, James J. Murphy, Gordon K. Madson, Bruce D. Marchant, Christopher B. Kocon, Debra S. Woolsey
  • Publication number: 20120220091
    Abstract: A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film by a sub-atmospheric chemical vapor deposition process that fills the trench and covers a top surface of the substrate. The method also includes etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench.
    Type: Application
    Filed: March 12, 2012
    Publication date: August 30, 2012
    Inventors: Ashok Challa, Alan Elbanhawy, Thomas E. Grebs, Nathan L. Kraft, Dean E. Probst, Rodney S. Ridley, Steven P. Sapp, Qi Wang, Chongman Yun, J.G. Lee, Peter H. Wilson, Joseph A. Yedinak, J.Y. Jung, H.C. Jang, Babak S. Sani, Richard Stokes, Gary M. Dolny, John Mytych, Becky Losee, Adam Selsley, Robert Herrick, James J. Murphy, Gordon K. Madson, Bruce D. Marchant, Christopher L. Rexer, Christopher B. Kocon, Debra S. Woolsey
  • Patent number: 8143124
    Abstract: A method of manufacturing a semiconductor device having a charge control trench and an active control trench with a thick oxide bottom includes forming a drift region, a well region extending above the drift region, an active trench extending through the well region and into the drift region, a charge control trench extending deeper into the drift region than the active trench, an oxide film that fills the active trench, the charge control trench and covers a top surface of the substrate, an electrode in the active trench, and source regions. The method also includes etching the oxide film off the top surface of the substrate and inside the active trench to leave a substantially flat layer of thick oxide having a target thickness at the bottom of the active trench.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: March 27, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ashok Challa, Alan Elbanhawy, Dean E. Probst, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Becky Losee, Robert Herrick, James J. Murphy, Gordon K. Madson, Bruce D. Marchant, Christopher B. Kocon, Debra S. Woolsey
  • Patent number: 8143123
    Abstract: A method for forming power semiconductor devices having an inter-electrode dielectric (IPD) layer inside a trench includes providing a semiconductor substrate with a trench, lining the sidewalls and bottom of the trench with a first layer of dielectric material, filling the trench with a first layer of conductive material to form a first electrode, recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench, forming a layer of polysilicon material on a top surface of the dielectric material and conductive material inside the trench, oxidizing the layer of polysilicon material, and forming a second electrode inside the trench atop the oxidized layer and isolated from trench sidewalls by a second dielectric layer. The oxidation step can be enhanced by either chemically or physically altering the top portion polysilicon such as by implanting impurities.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: March 27, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Thomas E. Grebs, Rodney S. Ridley, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Gary M. Dolny, John Mytych, Becky Losee, Adam Selsley, Christopher B. Kocon
  • Patent number: 7982265
    Abstract: A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: July 19, 2011
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ashok Challa, Alan Elbanhawy, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Christopher B. Kocon
  • Publication number: 20080199997
    Abstract: A method for forming power semiconductor devices having an inter-electrode dielectric (IPD) layer inside a trench includes providing a semiconductor substrate with a trench, lining the sidewalls and bottom of the trench with a first layer of dielectric material, filling the trench with a first layer of conductive material to form a first electrode, recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench, forming a layer of polysilicon material on a top surface of the dielectric material and conductive material inside the trench, oxidizing the layer of polysilicon material, and forming a second electrode inside the trench atop the oxidized layer and isolated from trench sidewalls by a second dielectric layer. The oxidation step can be enhanced by either chemically or physically altering the top portion polysilicon such as by implanting impurities.
    Type: Application
    Filed: March 3, 2008
    Publication date: August 21, 2008
    Inventors: Thomas E. Grebs, Rodney S. Ridley, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Gary M. Dolny, John Mytych, Becky Losee, Adam Selsley, Christopher B. Kocon
  • Publication number: 20080197407
    Abstract: A method for controlling the thickness of an expitaxially grown semiconductor material includes providing a semiconductor substrate that is doped by dopants of a first type; forming a buffer layer atop the semiconductor substrate, the buffer layer being doped with dopants of a second type that has much less diffusivity relative to that of dopants of the first type and forming the expitaxially grown layer atop the buffer layer to a desired thickness. The buffer layer, which acts to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer, can be doped with arsenic or carbon or both arsenic and carbon. A semiconductor device includes the buffer layer to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer.
    Type: Application
    Filed: February 28, 2008
    Publication date: August 21, 2008
    Inventors: Ashok Challa, Alan Elbanhawy, Steven P. Sapp, Qi Wang, Peter H. Wilson, Babak S. Sani, Christopher B. Kocon
  • Publication number: 20080150020
    Abstract: A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region.
    Type: Application
    Filed: January 22, 2008
    Publication date: June 26, 2008
    Inventors: Ashok Challa, Alan Elbanhawy, Thomas E. Grebs, Nathan L. Kraft, Dean E. Probst, Rodney S. Ridley, Steven P. Sapp, Qi Wang, Chongman Yun, J. G. Lee, Peter H. Wilson, Joseph A. Yedinak, J. Y. Jung, H. C. Jang, Babak S. Sani, Richard Stokes, Gary M. Dolny, John Mytych, Becky Losee, Adam Selsley, Robert Herrick, James J. Murphy, Gordon K. Madson, Bruce D. Marchant, Christopher L. Rexer, Christopher B. Kocon, Debra S. Woolsey
  • Publication number: 20080138953
    Abstract: A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film that fills the trench and covers a top surface of the substrate. and etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench. The oxide film can be deposited by sub-atmospheric chemical vapor deposition processes, directional Tetraethoxysilate (TEOS) processes, or high density plasma deposition processes that form a thicker oxide at the bottom of the trench than on the sidewalls of the trench.
    Type: Application
    Filed: February 15, 2008
    Publication date: June 12, 2008
    Inventors: Ashok Challa, Alan Elbanhawy, Dean E. Probst, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Becky Losee, Robert Herrick, James J. Murphy, Gordon K. Madson, Bruce D. Marchant, Christopher B. Kocon, Debra S. Woolsey
  • Patent number: 7345342
    Abstract: Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: March 18, 2008
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ashok Challa, Alan Elbanhawy, Steven P. Sapp, Peter H. Wilson, Babak S. Sani, Christopher B. Kocon