Patents by Inventor Balaji Srinivasan

Balaji Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170345493
    Abstract: Apparatuses and methods for accessing a memory cell are described. An example apparatus includes a first voltage circuit coupled to a node and is configured to provide a first voltage to the node and includes a second voltage circuit coupled to a node and is configured to provide a second voltage to the node. A memory cell is coupled to first and second access lines. A decoder circuit is coupled to the node and the first access line, and is configured to selectively couple the first access line to the node. The first voltage circuit is configured to provide the first voltage to the node before the second voltage circuit provides the second voltage to the node, and the second voltage circuit stops providing the second voltage before the node reaches the second voltage.
    Type: Application
    Filed: August 21, 2017
    Publication date: November 30, 2017
    Applicant: Micron Technology, Inc.
    Inventors: Sandeep Guliani, Balaji Srinivasan
  • Patent number: 9787485
    Abstract: The disclosed subject matter relates to systems, methods, and machine-readable media for ordering notifications for display in a social networking environment. One example system is configured to obtain a set of notifications for a user, wherein each notification in the set of notifications is generated in response to an event in a social network and, for each notification in the set of notifications, determine an event type associated with the notification and calculate a priority score for the notification based on the event type associated with the notification. The system is further configured to display the set of notifications based on the priority score for each notification in the set of notifications.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: October 10, 2017
    Assignee: Google Inc.
    Inventors: Zachary Yeskel, Balaji Srinivasan, Brett Rolston Lider, Alison Boncha, Boris Mazniker, Andrew Ames Bunner, Gregory Matthew Marra
  • Publication number: 20170289087
    Abstract: Systems, methods and computer readable media for delivery of notifications to devices without appropriate applications installed are disclosed. In some implementations, the systems, methods and computer readable media can deliver a notification message and process a response via an alternate mode when an appropriate application is not installed.
    Type: Application
    Filed: November 14, 2013
    Publication date: October 5, 2017
    Applicant: Google Inc.
    Inventors: Austin N. Chang, Balaji Srinivasan, Ivan Lee, Joshua Oldmeadow, Thomas R. Karlo, Francesco Nerieri, Daniel R. Sandler, Somaskanda Thyagaraja, Xiaoyong Liu, Peter H. Williamson
  • Patent number: 9767896
    Abstract: Apparatuses and methods for accessing a memory cell are described. An example apparatus includes a first voltage circuit coupled to a node and is configured to provide a first voltage to the node and includes a second voltage circuit coupled to a node and is configured to provide a second voltage to the node. A memory cell is coupled to first and second access lines. A decoder circuit is coupled to the node and the first access line, and is configured to selectively couple the first access line to the node. The first voltage circuit is configured to provide the first voltage to the node before the second voltage circuit provides the second voltage to the node, and the second voltage circuit stops providing the second voltage before the node reaches the second voltage.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: September 19, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sandeep Guliani, Balaji Srinivasan
  • Patent number: 9747978
    Abstract: The present disclosure relates to reference and sense architecture in a cross-point memory. An apparatus may include a memory controller configured to select a target memory cell for a memory access operation. The memory controller includes word line (WL) switch circuitry configured to select a global WL (GWL) and a local WL (LWL) associated with the target memory cell; bit line (BL) switch circuitry configured to select a global BL (GBL) and a local BL (LBL) associated with the target memory cell; and sense circuitry including a first sense circuitry capacitance and a second sense circuitry capacitance, the sense circuitry configured to precharge the selected GWL, the LWL and the first sense circuitry capacitance to a WL bias voltage WLVDM, produce a reference voltage (VREF) utilizing charge on the selected GWL and charge on the first sense circuitry capacitance and determine a state of the target memory cell based, at least in part, on VREF and a detected memory cell voltage VLWL.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 29, 2017
    Assignee: INTEL CORPORATION
    Inventors: Balaji Srinivasan, Doyle Rivers, Derchang Kau, Matthew Goldman
  • Publication number: 20170213589
    Abstract: Apparatuses and methods for accessing a memory cell are described. An example apparatus includes a first voltage circuit coupled to a node and is configured to provide a first voltage to the node and includes a second voltage circuit coupled to a node and is configured to provide a second voltage to the node. A memory cell is coupled to first and second access lines. A decoder circuit is coupled to the node and the first access line, and is configured to selectively couple the first access line to the node. The first voltage circuit is configured to provide the first voltage to the node before the second voltage circuit provides the second voltage to the node. and the second voltage circuit stops providing the second voltage before the node reaches the second voltage.
    Type: Application
    Filed: January 21, 2016
    Publication date: July 27, 2017
    Applicant: Micron Technology, Inc.
    Inventors: Sandeep Guliani, Balaji Srinivasan
  • Publication number: 20170208443
    Abstract: A method of adaptively reporting buffer status by a dual subscriber identity module dual standby (DSDS) terminal is provided. The method includes computing a rate at which uplink (UL) grants are allocated by a network over a period of time for a first subscriber unit associated with the DSDS terminal, determining a first time period to initiate buffer status reporting (BSR) using a radio frequency (RF) unit, wherein the first time period corresponds to a time period in which a BSR interval initializes, determining a second time period in which a second subscriber unit associated with the DSDS terminal requires the RF unit, and adaptively reporting the buffer status based on the rate and a difference between the second time period and the first time period.
    Type: Application
    Filed: August 4, 2016
    Publication date: July 20, 2017
    Inventors: Ashish Kumar GUPTA, Balaji Srinivasan THIRUVENKATACHARI, Rohit KUMAR, Shrinath Ramamoorthy MADHURANTAKAM, Swapnil Vinod KHACHANE
  • Publication number: 20170186486
    Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.
    Type: Application
    Filed: October 24, 2016
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Davide Mantegazza, Sandeep Guliani, Balaji Srinivasan, Kiran Pangal
  • Patent number: 9543005
    Abstract: A multistage read can dynamically change wordline capacitance as a function of threshold voltage of a memory cell being read. The multistage read can reduce current spikes and reduce the heating up of a memory cell during a read. A memory device includes a global wordline driver to connect a wordline of a selected memory cell to the sensing circuit, and a local wordline driver local to the memory cell. After the wordline is charged to a read voltage, control logic can selectively enable and disable a portion or all of the global wordline driver and the local wordline driver in conjunction with applying different discrete voltage levels to the bitline to perform a multistage read.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: January 10, 2017
    Assignee: Intel Corporation
    Inventors: Sandeep K Guliani, Kiran Pangal, Balaji Srinivasan, Chaohong Hu
  • Publication number: 20160372193
    Abstract: Embodiments of the present disclosure describe read and write operations in phase change memory to reduce snapback disturb. In an embodiment, an apparatus includes read circuitry to apply a read voltage to a phase change memory (PCM) cell, setback circuitry to apply a setback pulse to the PCM cell in response to the application of the read voltage, wherein the setback pulse is a shorter set pulse performed for a first period of time that is shorter than a second period of time for a regular set pulse that is configured to transition the PCM cell from an amorphous state to a crystalline state, sense circuitry to sense, concurrently with application of the setback pulse, whether the PCM cell is in the amorphous state or the crystalline state. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 22, 2016
    Inventors: Arjun Kripanidhi, Kiran Pangal, Lark-Hoon Leem, Balaji Srinivasan
  • Patent number: 9519570
    Abstract: Embodiments of the present invention disclose a method, computer program product, and system for recording and displaying graphical user interface snapshots during automated testing. A computer captures a first snapshot of a complete graphical user interface, wherein the graphical user interface has at least one graphical user interface control. The computer determines a location of the at least one graphical user interface control. The computer determines that a first test step has altered the at least one graphical user interface control. The computer captures a second snapshot of the altered graphical user interface control. The computer stores the second snapshot and the location of the graphical user interface control in association with the test step.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: December 13, 2016
    Assignee: International Business Machines Corporation
    Inventors: Balaji Srinivasan, Madhu Tadiparthi
  • Patent number: 9508175
    Abstract: Methods and systems for intelligently cropping images, including receiving, over a computer network, a source image, and then associating a first identifier tag with a first object in the source image. A cropped image is generated from the source image wherein the cropping is based on the first object. The system and method then notifying a first user that the first identifier tag is associated with the first object in the cropped image, wherein the notification includes the cropped image.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: November 29, 2016
    Assignee: Google Inc.
    Inventors: Balaji Srinivasan, Brett Rolston Lider, Zach Yeskel, Alison Boncha
  • Publication number: 20160342501
    Abstract: System and method for accelerating automated testing is disclosed. First, a test script of a screen is recorded to identify user interface elements comprising data fields present on the screen. An input is received in the data fields. Based on the input, one or more test case templates are selected. Further, data sets and verification types required corresponding to the input are obtained. The data sets are obtained based on the one or more test case templates. The verification types are obtained from a user. Subsequently, the one or more test case templates, the data sets, and the verification types are integrated to generate an executable test case file. Based on the executable test case file, the test script is modified and further executed. Upon executing, a report is generated.
    Type: Application
    Filed: March 18, 2016
    Publication date: November 24, 2016
    Inventors: Rajesh Venkatesan, Kirthiga Balaji Srinivasan, Vidhya Muthamil Selvan, Madhava Venkatesh Raghavan, Sezhiyan Navarasu
  • Publication number: 20160337299
    Abstract: Systems, methods and computer readable media for prioritized notification display are described. Some implementations can include a method. The method can include receiving a notification, and determining a priority score of the notification. When the notification is determined to have a priority equal to or greater than a given value, the method can also include causing the notification to be displayed individually in a user interface. The method can further include causing the notification to be displayed as a portion of a deck element in the user interface when the notification is determined to have a priority less than the given value.
    Type: Application
    Filed: May 13, 2015
    Publication date: November 17, 2016
    Applicant: Google Inc.
    Inventors: Joshua LANE, Balaji SRINIVASAN, Josh OLDMEADOW
  • Patent number: 9478286
    Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Davide Mantegazza, Sandeep Guliani, Balaji Srinivasan, Kiran Pangal
  • Publication number: 20160297840
    Abstract: The invention relates to (S)-acyl-4?-phosphopantetheine derivatives, methods of their synthesis, and related medical uses of such compounds. Preferred medical uses relate to the treatment of neurodegenerative diseases, such as PKAN.
    Type: Application
    Filed: October 29, 2014
    Publication date: October 13, 2016
    Inventors: Branko JENKO, Gregor KOSEC, Hrvoje PETKOVIC, Ajda PODGORSEK BERKE, Jerca PAHOR, Alen CUSAK, Oda Cornelia Maria SIBON, Balaji SRINIVASAN
  • Publication number: 20160284398
    Abstract: Embodiments of the present disclosure describe read and write operations in phase change memory to reduce snapback disturb. In an embodiment, an apparatus includes read circuitry to apply a read voltage to a phase change memory (PCM) cell, setback circuitry to apply a setback pulse to the PCM cell in response to the application of the read voltage, wherein the setback pulse is a shorter set pulse performed for a first period of time that is shorter than a second period of time for a regular set pulse that is configured to transition the PCM cell from an amorphous state to a crystalline state, sense circuitry to sense, concurrently with application of the setback pulse, whether the PCM cell is in the amorphous state or the crystalline state. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Arjun Kripanidhi, Kiran Pangal, Lark-Hoon Leem, Balaji Srinivasan
  • Publication number: 20160262001
    Abstract: Apparatuses (including, but not limited to, user equipment (UE) and base stations, such as evolved Node Bs (eNBs)), systems, and methods for managing resource allocation and utilization for multi-hop device to device (D2D) communication are described. In one method, a UE sends a request to a network for a resource by which the UE can perform initial device discovery in order to perform D2D communication. If available, the network grants the resource and the UE performs initial device discovery using the resource, which includes calculating communication metrics. The UE then sends information based on the initial device discovery to the network which, based at least on that information and if available, sends back a grant for a resource for device discovery. The UE uses the grant to perform device discovery, which includes re-calculating the communication metrics.
    Type: Application
    Filed: July 10, 2015
    Publication date: September 8, 2016
    Inventors: Ashish Kumar GUPTA, Balaji Srinivasan THIRUVENKATACHARI, Sivashankar SEKAR
  • Patent number: 9437293
    Abstract: Embodiments of the present disclosure describe read and write operations in phase change memory to reduce snapback disturb. In an embodiment, an apparatus includes read circuitry to apply a read voltage to a phase change memory (PCM) cell, setback circuitry to apply a setback pulse to the PCM cell in response to the application of the read voltage, wherein the setback pulse is a shorter set pulse performed for a first period of time that is shorter than a second period of time for a regular set pulse that is configured to transition the PCM cell from an amorphous state to a crystalline state, sense circuitry to sense, concurrently with application of the setback pulse, whether the PCM cell is in the amorphous state or the crystalline state. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: September 6, 2016
    Assignee: Intel Corporation
    Inventors: Arjun Kripanidhi, Kiran Pangal, Lark-Hoon Leem, Balaji Srinivasan
  • Publication number: 20160249408
    Abstract: Methods and apparatuses are provided for releasing a radio resource control (RRC) connection in a wireless communication network. A user equipment (UE) monitors the RRC connection. The UE performs a local RRC connection release when the UE has failed to receive an RRC connection release message from a network based on a predefined criterion. The RRC transmits an RRC connection release indication to the network. A first subscriber identity module (SIM) is transitioned from an RRC connected mode to an RRC idle mode.
    Type: Application
    Filed: February 24, 2016
    Publication date: August 25, 2016
    Inventors: Balaji Srinivasan THIRUVENKATACHARI, Ashish Kumar GUPTA, Shrinath Ramamoorthy MADHURANTAKAM