Patents by Inventor Beatrice Biasse

Beatrice Biasse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11005041
    Abstract: A method for manufacturing a resistive random access memory includes depositing a layer made of an active material of variable electrical resistance on a substrate containing a first electrode, forming a lower electrode; depositing an electrically conductive layer on the active material layer; etching the electrically conductive layer so as to delimit a second electrode, forming an upper electrode, facing the lower electrode; exposing at least one flank of the upper electrode to an ion beam inclined with respect to the normal to the substrate by an angle (?) comprised between 20° and 65°, so as to implant the ions in a portion of the active material layer adjacent to the flank and located under the upper electrode, the ion implantation conditions being chosen so as to create defects in the structure of the active material and to obtain an average implantation width comprised between 5 nm and 10 nm.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: May 11, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Christelle Charpin-Nicolle, Béatrice Biasse
  • Publication number: 20190334085
    Abstract: A method for manufacturing a resistive random access memory includes depositing a layer made of an active material of variable electrical resistance on a substrate containing a first electrode, forming a lower electrode; depositing an electrically conductive layer on the active material layer; etching the electrically conductive layer so as to delimit a second electrode, forming an upper electrode, facing the lower electrode; exposing at least one flank of the upper electrode to an ion beam inclined with respect to the normal to the substrate by an angle (?) comprised between 20° and 65°, so as to implant the ions in a portion of the active material layer adjacent to the flank and located under the upper electrode, the ion implantation conditions being chosen so as to create defects in the structure of the active material and to obtain an average implantation width comprised between 5 nm and 10 nm.
    Type: Application
    Filed: November 16, 2017
    Publication date: October 31, 2019
    Inventors: Christelle CHARPIN-NICOLLE, Béatrice BIASSE
  • Patent number: 6197695
    Abstract: This invention relates to a process for the manufacture of one electronic structure comprising at least one active component and at least one passive component or element on a support substrate made of an insulating material. A characteristic process comprises the following steps: make the active component in a surface layer made of semiconducting material from an initial substrate comprising a wafer of semiconducting material supporting the said surface layer, make electrical insulation areas capable of insulating the passive component or element from the active component, make the passive component or element on and/or in the electrical insulation areas, prepare the surface of the initial substrate face with the said electronic structure to make this face compatible for bonding with another substrate by molecular bonding, perform the bonding, the other substrate being the said support substrate made of an insulating material, eliminate all or part of the wafer of semiconducting material.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: March 6, 2001
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Jean-Pierre Joly, Bernard Aspar, Béatrice Biasse, Marc Zussy
  • Patent number: 6103597
    Abstract: A method of obtaining a thin film from a substrate made of semiconductor material, the thin film including at least one element on one face of the substrate made of a material different from the semiconductor material, and conferring to the thin film a heterogeneous structure.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 15, 2000
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Beatrice Biasse, Michel Bruel
  • Patent number: 5993677
    Abstract: A thin film is transferred from an initial substrate onto a final substrate. The process includes the following successive stages: joining of the thin film (112) onto a handle substrate (120) comprising a cleavage zone, elimination of the initial substrate, joining of the thin film (112) with a final substrate (132), and cleavage of the handle substrate (120) following the cleavage zone. The cleavage zone includes a film of micro-bubbles formed by ion implantation. The invention has, in particular, applications in the fabrication of three-dimensional structures of integrated circuits.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: November 30, 1999
    Assignee: Commissariat a L'Energie Atomique
    Inventors: Beatrice Biasse, Michel Bruel, Marc Zussy
  • Patent number: 5661333
    Abstract: A substrate for integrated components including a support structure and a thin non-conductive film. An intermediate film is placed between the support structure and the thin non-conductive film. The intermediate film is a sacrificial film which may be removed chemically. By doing so, the thin non-conductive film may be liberated from the support structure. The intermediate film is traversed by channels which carry the chemicals for removing the sacrificial film. The channels may form a grid on the surface of the intermediate film.
    Type: Grant
    Filed: January 25, 1995
    Date of Patent: August 26, 1997
    Assignee: Commissariat a L'Energie Atomique
    Inventors: Michel Bruel, Beatrice Biasse
  • Patent number: 5656181
    Abstract: The process for the preparation of a waveguide buried in a glass substrate according to the invention consists of the following stages:a stage of producing a waveguide (28, 38) by ion exchange on the surface of each of two glass substrates (22, 32),a stage of aligning both substrates, so that the surfaces in which the waveguides have been produced face one another,a direct wafer bonding stage of the two substrates.
    Type: Grant
    Filed: July 3, 1995
    Date of Patent: August 12, 1997
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Beatrice Biasse, Florent Pigeon