Abstract: A method for serializing communications in the computing field includes serializing input data into a serialized stream of symbols, based on one or more encodings, at a serializer, each symbol including a disparity code selected based on a running disparity (RD) of the serialized stream of symbols. The running disparity (RD) is tracked by setting the RD to an initial value, and then adding a disparity of each symbol to the RD to ensure the RD does not exceed a desired maximum, e.g., three. A positive disparity encoding or a negative disparity encoding of each symbol is selected for transmission based on the RD. The serialized data stream of symbols is transmitted along a data conduit, to a deserializer, in which the serialized data stream of symbols is deserialized to determine a corresponding bit value, for outputting decoded information in parallel form.

Abstract: There is disclosed a self-timed processor. The self-timed processor includes combinatorial logic comprising multi-rail delay insensitive asynchronous logic (DIAL) to output one or more multi-rail data values to a multiplexer. It also includes a test pattern input to output a test pattern bit stream of multi-rail test data values to the multiplexer. The multiplexer has Boolean logic to output one or more multi-rail multiplexed values to a latch. The multiplexer also has a single rail selector input to select whether the multi-rail multiplexed values are the multi-rail data values or the multi-rail test data values.

Abstract: There is disclosed a self-timed processor. The self-timed processor includes combinatorial logic comprising multi-rail delay insensitive asynchronous logic (DIAL) to output one or more multi-rail data values to a multiplexer. It also includes a test pattern input to output a test pattern bit stream of multi-rail test data values to the multiplexer. The multiplexer has Boolean logic to output one or more multi-rail multiplexed values to a latch. The multiplexer also has a single rail selector input to select whether the multi-rail multiplexed values are the multi-rail data values or the multi-rail test data values.

Abstract: There is disclosed a self-timed processor. The self-timed processor includes combinatorial logic comprising multi-rail delay insensitive asynchronous logic (DIAL) to output one or more multi-rail data values to a multiplexer. It also includes a test pattern input to output a test pattern bit stream of multi-rail test data values to the multiplexer. The multiplexer has Boolean logic to output one or more multi-rail multiplexed values to a latch. The multiplexer also has a single rail selector input to select whether the multi-rail multiplexed values are the multi-rail data values or the multi-rail test data values.