Patents by Inventor Beng Keh See

Beng Keh See has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10549985
    Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 4, 2020
    Assignee: Infineon Technologies AG
    Inventors: Dominic Maier, Matthias Steiert, Chau Fatt Chiang, Christian Geissler, Bernd Goller, Thomas Kilger, Johannes Lodermeyer, Franz-Xaver Muehlbauer, Chee Yang Ng, Beng Keh See, Claus Waechter
  • Publication number: 20190341324
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 10396007
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20180148322
    Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
    Type: Application
    Filed: August 31, 2017
    Publication date: May 31, 2018
    Inventors: Dominic Maier, Matthias Steiert, Chau Fatt Chiang, Christian Geissler, Bernd Goller, Thomas Kilger, Johannes Lodermeyer, Franz-Xaver Muehlbauer, Chee Yang Ng, Beng Keh See, Claus Waechter
  • Publication number: 20170256472
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 7, 2017
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 9691687
    Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module includes a first semiconductor device, a frame arranged on the first semiconductor device, the frame including a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 27, 2017
    Assignee: Infineon Technologies AG
    Inventors: Daniel Kehrer, Ulrich Krumbein, Beng-Keh See, Horst Theuss, Helmut Wietschorke, Tze Yang Hin, Stefan Martens
  • Patent number: 9653405
    Abstract: In various embodiments, a chip arrangement may be provided. The chip arrangement may include a metallic carrier. The chip arrangement may also include at least one chip arranged on the metallic carrier, wherein the at least one chip includes a chip contact, wherein the chip contact is electrically coupled to the metallic carrier. The chip arrangement may also include encapsulation material at least partially encapsulating the at least one chip. The chip arrangement may also include an electrically conductive shielding structure formed over at least a portion of the encapsulation material to electrically contact the metallic carrier.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: May 16, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Horst Theuss, Beng Keh See
  • Publication number: 20140231971
    Abstract: In various embodiments, a chip arrangement may be provided. The chip arrangement may include a metallic carrier. The chip arrangement may also include at least one chip arranged on the metallic carrier, wherein the at least one chip includes a chip contact, wherein the chip contact is electrically coupled to the metallic carrier. The chip arrangement may also include encapsulation material at least partially encapsulating the at least one chip. The chip arrangement may also include an electrically conductive shielding structure formed over at least a portion of the encapsulation material to electrically contact the metallic carrier.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Horst Theuss, Beng Keh See
  • Publication number: 20140231974
    Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module includes a first semiconductor device, a frame arranged on the first semiconductor device, the frame including a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.
    Type: Application
    Filed: April 30, 2014
    Publication date: August 21, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Daniel Kehrer, Ulrich Krumbein, Beng-Keh See, Horst Theuss, Helmut Wietschorke, Tze Yang Hin, Stefan Martens
  • Patent number: 8749056
    Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module includes a first semiconductor device, a frame arranged on the first semiconductor device, the frame including a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Daniel Kehrer, Stefan Martens, Tze Yang Hin, Helmut Wietschorke, Horst Theuss, Beng Keh See, Ulrich Krumbein
  • Patent number: 8722462
    Abstract: A method of manufacturing a semiconductor package includes providing a carrier and attaching at least one semiconductor piece to the carrier. An encapsulant is deposited onto the at least one semiconductor piece to form an encapsulated semiconductor arrangement. The encapsulated semiconductor arrangement is then singulated in at least two semiconductor packages, wherein each package includes a semiconductor die separated from the semiconductor piece during singulation.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: May 13, 2014
    Assignee: Infineon Technologies AG
    Inventors: Klaus Elian, Beng-Keh See, Horst Theuss
  • Patent number: 8535983
    Abstract: In one embodiment a method for manufacturing a semiconductor device comprises arranging a wafer on a carrier, the wafer comprising singulated chips; bonding the singulated chips to a support wafer, and removing the carrier.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: September 17, 2013
    Assignee: Infineon Technologies AG
    Inventors: Tze Yang Hin, Stefan Martens, Werner Simbuerger, Helmut Wietschorke, Horst Theuss, Beng Keh See, Ulrich Krumbein
  • Publication number: 20120309130
    Abstract: In one embodiment a method for manufacturing a semiconductor device comprises arranging a wafer on a carrier, the wafer comprising singulated chips; bonding the singulated chips to a support wafer, and removing the carrier.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 6, 2012
    Applicant: Infineon Technologies AG
    Inventors: Tze Yang Hin, Stefan Martens, Werner Simbuerger, Helmut Wietschorke, Horst Theuss, Beng Keh See, Ulrich Krumbein
  • Publication number: 20120299170
    Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module comprises a first semiconductor device, a frame arranged on the first semiconductor device, the frame comprising a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.
    Type: Application
    Filed: May 26, 2011
    Publication date: November 29, 2012
    Inventors: Daniel Kehrer, Stefan Martens, Tze Yang Hin, Helmut Wietschorke, Horst Theuss, Beng Keh See, Ulrich Krumbein
  • Publication number: 20120273935
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are disclosed. An embodiment comprises forming a bump on a die, the bump having a solder top, melting the solder top by pressing the solder top directly on a contact pad of a support substrate, and forming a contact between the die and the support substrate.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 1, 2012
    Inventors: Stefan Martens, Tze Yang Hin, Kian Pin Queck, Kathleen Ong, Chin Wei Ronnie Tan, Beng Keh See, Ulrich Krumbein, Horst Theuss
  • Patent number: 8053280
    Abstract: A method for producing multiple semiconductor devices. An electrically conductive layer is applied onto a semiconductor wafer. The semiconductor wafer is structured to produce multiple semiconductor chips. The electrically conductive layer is structured to produce multiple semiconductor devices.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: November 8, 2011
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Chwee Lan Lai, Beng Keh See
  • Publication number: 20110241190
    Abstract: A method of manufacturing a semiconductor package includes providing a carrier and attaching at least one semiconductor piece to the carrier. An encapsulant is deposited onto the at least one semiconductor piece to form an encapsulated semiconductor arrangement. The encapsulated semiconductor arrangement is then singulated in at least two semiconductor packages, wherein each package includes a semiconductor die separated from the semiconductor piece during singulation.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Klaus Elian, Beng-Keh See, Horst Theuss
  • Publication number: 20090134512
    Abstract: A method for producing multiple semiconductor devices. An electrically conductive layer is applied onto a semiconductor wafer. The semiconductor wafer is structured to produce multiple semiconductor chips. The electrically conductive layer is structured to produce multiple semiconductor devices.
    Type: Application
    Filed: September 19, 2008
    Publication date: May 28, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Chau Fatt Chiang, Chwee Lan Lai, Beng Keh See