Abstract: A display panel, including a drive circuit, where the drive circuit is at least used to drive the display panel to display obtained display data. The drive circuit includes a shift register, a data buffer and a first control circuit; the shift register is used to output display data of each sub-pixel according to a preset timing sequence; the data buffer at least includes a first cache module composed of N repeat units; a repeat unit includes at least one cache unit, the cache unit is connected to the shift register, and two cache units at a same position in the k-th repeat unit and the (k+1)-th repeat unit are multiplexed with a same clock signal terminal; the cache unit is used to be turned on in response to an output signal from the clock signal terminal connected to the cache unit, to cache the received display data.