Abstract: The invention relates to a process for annealing a structure that includes at least one wafer, with the annealing process including conducting a first annealing of the structure in an oxidizing atmosphere while holding the structure in contact with a holder in a first position in order to oxidize at least portion of the exposed surface of the structure, shifting the structure on the holder into a second position in which non-oxidized regions of the structure are exposed, and conducting a second annealing of the structure in an oxidizing atmosphere while holding the structure in the second position. The process provides an oxide layer on the structure.

Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.

Abstract: The invention relates to a method for production of a detachable substrate, comprising a method step for the production of an interface by means of fixing, using molecular adhesion, one face of a layer on one face of a substrate, in which, before fixing, a treatment stage for at least one of said faces is provided, rendering the mechanical hold at the interface at such a controlled level to be compatible with a subsequent detachment.

Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.

Abstract: The invention relates to a method for fabricating a semiconductor substrate by providing a silicon on insulator type substrate that includes a base, an insulating layer and a first semiconductor layer, doping the first semiconductor layer to thereby obtain a modified first semiconductor layer, and providing a second semiconductor layer with a different dopant concentration than the modified first semiconductor layer over or on the modified first semiconductor layer. With this method, an improved dopant concentration profile can be achieved through the various layers which makes the substrates in particular more suitable for various optoelectronic applications.

Abstract: The invention concerns a process of preparing a thin layer to be transferred onto a substrate having a surface topology and, therefore, variations in altitude or level, in a direction perpendicular to a plane defined by the thin layer, this process comprising the formation on the thin layer of a layer of adhesive material, the thickness of which enables carrying out a plurality of polishing steps of its surface in order to eliminate any defect or void or almost any defect or void, in preparation for an assembly via a molecular kind of bonding with the substrate.

Abstract: The invention concerns a method for preparing a thin layer (28) or a chip to be transferred onto another substrate, this method including the realization, above the surface of said thin layer or said chip, of at least one layer, called adhesive layer (25), and of at least one layer, called first barrier layer (22), the adhesive layer being made of a material of which etching presents selectivity in relation to the material of the barrier layer.

Abstract: The invention provides a method for forming a semiconductor component with a rough buried interface. The method includes providing a first semiconductor substrate having a first surface of roughness R1. The method further includes thermally oxidizing the first surface of the first semiconductor substrate to form an oxide layer defining an external oxide surface on the first semiconductor substrate and a buried oxide-semiconductor interface below the oxide surface, so that the buried oxide surface has a roughness R2 that is less than R1. The method also includes assembling the oxide surface of the first semiconductor substrate with a second substrate. The invention also provides a component formed according to the method of the invention.

Abstract: The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a first material, a step of forming a semiconductor layer, between and on said patterns, a step of assembling said semiconductor layer with a second support.

Abstract: The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.

Abstract: The invention relates to the preparation of a thin layer comprising a step in which an interface is created between a layer used to create said thin layer and a substrate, characterized in that said interface is made in such a way that it is provided with at least one first zone (Z1) which has a first level of mechanical strength, and a second zone (Z2) which has a level of mechanical strength which is substantially lower than that of the first zone. Said interface can be created by glueing surfaces which are prepared in a differentiated manner, by a layer which is buried and embrittled in a differentiated manner in said zones, or by an intermediate porous layer.

Abstract: The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a first material, a step of forming a semiconductor layer, between and on said patterns, a step of assembling said semiconductor layer with a second support.

Abstract: The disclosure relates to methods and systems for separating a membrane from a substrate. In accordance with a preferred embodiment, the method includes applying at least one member to the membrane by way of an adhesive, wherein the adhesive is applied to substantially less than the entirety of the surface of said membrane which is not facing the substrate. The method further includes separating at least a part of the membrane from the substrate by applying a force to the at least one member.

Abstract: The invention relates to a compliant substrate (5) comprising a carrier (1) and at least one thin layer (4), formed on the surface of the carrier and intended to receive, in integral manner, a stress-giving structure. The carrier (1) and the thin layer (4) are joined to one another by joining means (3) such that the stresses brought by said structure are absorbed in whole or in part by the thin layer (4) and/or by the joining means (3) which comprise at least one joining zone chosen from among the following joining zones: a layer of microcavities and/or a bonding interface whose bonding energy is controlled to permit absorption of said stresses.

Abstract: Process for fabricating a structure in the form of a wafer, including at least a substrate, a superstrate and at least one intermediate layer interposed between the substrate and the superstrate, the process including: forming, on a substrate, at least one intermediate layer including at least one base material in which extrinsic atoms or molecules are distributed, these differing from the atoms or molecules of the base material, so as to constitute a substructure; applying a base heat treatment to this substructure such that, in the temperature range of this heat treatment, the presence of the chosen extrinsic atoms or molecules in the chosen base material causes a structural transformation of said intermediate layer; and joining a superstrate to said heat-treated intermediate layer so as to obtain said structure in the form of a wafer.

Abstract: The invention relates to a process of bonding by molecular adhesion of two layers, such as wafers of semiconductor material, wherein propagation of a first bonding wave is initiated from a pressure point applied to at least one of the two layers, and wherein the first bonding wave step is followed by propagating a second bonding wave over an area, for example, in the vicinity of the pressure point. Propagation of the second bonding wave may be obtained through the interposing of a separation element between the two wafers and the withdrawal of the element, for example, after the beginning of the first bonding wave propagation.

Abstract: The invention concerns a method for making thin layers containing microcomponents using a substrate. The method includes the following steps: a) provides a substrate; b) local implantation of at least a gaseous species in said substrate perpendicular to a plurality of implantation zones defined on the surface of the substrate, avoiding, by adequate selection of the depth and the shape of said implantation zones, degradation of said surface of the substrate during the step c); c) producing microcomponents in the surface layer of the substrate delimited by the implanting depth; and d) separating the substrate in two parts, one part containing the surface layer including said microcomponents, and the other the rest of the substrate. The invention is useful for producing microcomponents to be integrate on supports different from the those used for their manufacture.

Abstract: The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.

Abstract: A semiconductor structure includes a thin semiconductor layer fixed on an applicator or flexible support, the thin layer having an exposed surface characterized by fractured solid bridges spaced apart by cavities. A method of producing the thin layer of semiconductor material includes implanting ions into the semiconductor wafer to define a reference plane, where the ion dose is above a minimum dose, but below a critical dose so as to avoid degrading the wafer surface. The method further includes applying a thermal treatment to define a layer of microcavities and applying stress to free the thin layer from the wafer.

Abstract: A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.