Patents by Inventor Bernard Steele Meyerson

Bernard Steele Meyerson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090026459
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm?3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Application
    Filed: June 27, 2008
    Publication date: January 29, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jack Oon Chu, Basanth Jaqannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Publication number: 20080229128
    Abstract: A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.
    Type: Application
    Filed: June 2, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Heller, Michael Ignatowski, Bernard Steele Meyerson, James Walter Rymarczyk
  • Patent number: 7401240
    Abstract: A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: July 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Heller, Jr., Michael Ignatowski, Bernard Steele Meyerson, James Walter Rymarczyk
  • Patent number: 7183576
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitakial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm?3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: February 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Patent number: 6908866
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm?3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: June 21, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Publication number: 20040161911
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm−3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Publication number: 20040161875
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitakial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm−3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Patent number: 6750119
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm−3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Publication number: 20020182423
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon <1020 cm−3, the as-grown p- or n-type dopant profile can withstand furnace anneals to temperatures of 850° C. and rapid thermal anneal temperatures to 1000° C.
    Type: Application
    Filed: April 20, 2001
    Publication date: December 5, 2002
    Applicant: International Business Machines Corporation
    Inventors: Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott
  • Patent number: 6004137
    Abstract: A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transconductance of the device can be optimized by controlling the location of the carriers within the channel.
    Type: Grant
    Filed: September 23, 1993
    Date of Patent: December 21, 1999
    Assignee: International Business Machines Corporation
    Inventors: Emmanuel Crabbe, Bernard Steele Meyerson, Johannes Maria Cornelis Stork, Sophie Verdonckt-Vandebroek
  • Patent number: 5906680
    Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon on a plurality of substrates in a hot wall, isothermal deposition system is described. The deposition temperatures are less than about 800.degree. C., and the operating pressures during deposition are such that non-equilibrium growth kinetics determine the deposition of the silicon films. An isothermal bath gas of silicon is produced allowing uniform deposition of epitaxial silicon films simultaneously on multiple substrates. This is a flow system in which means are provided for establishing an ultrahigh vacuum in the range of about 10.sup.-9 Torr prior to epitaxial deposition. The epitaxial silicon layers can be doped in-situ to provide very abruptly defined regions of either n- or p-type conductivity.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: May 25, 1999
    Assignee: International Business Machines Corporation
    Inventor: Bernard Steele Meyerson
  • Patent number: 5821577
    Abstract: A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transconductance of the device can be optimized by controlling the location of the carriers within the channel.
    Type: Grant
    Filed: November 30, 1992
    Date of Patent: October 13, 1998
    Assignee: International Business Machines Corporation
    Inventors: Emmanuel Crabbe', Bernard Steele Meyerson, Johannes Maria Cornelis Stork, Sophie Verdonckt-Vandebroek
  • Patent number: 5810924
    Abstract: A multi-layered structure and process for forming it arc described, incorporating a single crystal substrate, a plurality of epitaxial layers having graded composition wherein the layers have changing lattice spacings not exceeding about 2 percent per 1000 .ANG. of thickness whereby misfit dislocations are formed to relieve strain and then move to the edges of respective layers. The invention overcomes the problem of large numbers of misfit dislocations threading to the surface of the top layer, especially during device processing at temperatures in a range from 700 to 900 degrees Celsius. Fully relaxed, incommensurate structures having low defect densities are obtained, where arbitrary combinations of materials can be used.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 22, 1998
    Assignee: International Business Machines Corporation
    Inventors: Francoise Kolmer Legoues, Bernard Steele Meyerson
  • Patent number: 5777364
    Abstract: A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transconductance of the device can be optimized by controlling the location of the carriers within the channel.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: July 7, 1998
    Assignee: International Business Machines Corporation
    Inventors: Emmanuel Crabbe, Bernard Steele Meyerson, Johannes Maria Cornelis Stork, Sophie Verdonckt-Vandebroek
  • Patent number: 5659187
    Abstract: A multi-layered structure and process for forming it are described, incorporating a single crystal substrate, a plurality of epitaxial layers having graded composition wherein the layers have changing lattice spacings not exceeding about 2 percent per 1000 .ANG. of thickness whereby misfit dislocations are formed to relieve strain and then move to the edges of respective layers. The invention overcomes the problem of large numbers of misfit dislocations threading to the surface of the top layer, especially during device processing at temperatures in a range from 700 to 900 degrees Celsius. Fully relaxed, incommensurate structures having low defect densities are obtained, where arbitrary combinations of materials can be used.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 19, 1997
    Assignee: International Business Machines Corporation
    Inventors: Francoise Kolmer Legoues, Bernard Steele Meyerson