Patents by Inventor Bernd Karl Appelt

Bernd Karl Appelt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367384
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate, a semiconductor device, an encapsulant, a balance structure, and a warpage-resistant layer. The semiconductor device is disposed on the substrate. The encapsulant encapsulates the semiconductor device. The balance structure is on the semiconductor device and contacting the encapsulant. The warpage-resistant layer is between the semiconductor device and the balance structure. The encapsulant contacts a lateral surface of the warpage-resistant layer.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
  • Publication number: 20220359363
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
  • Publication number: 20220336332
    Abstract: A conductive structure, a package structure and a method for manufacturing the same are provided. The conductive structure includes a main portion, a first electrical contact, a second electrical contact, a first post and a second post. The main portion has a first surface and a second surface opposite to the first surface. The first electrical contact is disposed adjacent to the first surface of the main portion. The second electrical contact is disposed adjacent to the second surface of the main portion and electrically connected to the first electrical contact. The first post is electrically connected to the first electrical contact. The second post is electrically connected to the second electrical contact.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Publication number: 20220328416
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.
    Type: Application
    Filed: April 8, 2021
    Publication date: October 13, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
  • Publication number: 20220319972
    Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a dielectric layer, an electronic component, a first conductive layer, and a conductive element. The dielectric layer has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the dielectric layer. The first conductive layer is embedded in the dielectric layer and adjacent to the first surface of the dielectric layer. The conductive element is disposed on the first surface of the dielectric layer and in contact with the first conductive layer.
    Type: Application
    Filed: April 6, 2021
    Publication date: October 6, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Patent number: 11462484
    Abstract: An electronic package and manufacturing method thereof are provided. The electronic package includes a substrate, a first encapsulant, a wettable flank and a shielding layer. The substrate includes a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface. The first encapsulant is disposed on the first surface of the substrate. The wettable flank is exposed from the side surface of the substrate. The shielding layer covers a side surface of the first encapsulant, wherein on the side surface of the substrate, the shielding layer is spaced apart from the wettable flank.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: October 4, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt, Kay Stephan Essig
  • Publication number: 20220310410
    Abstract: A substrate structure, a package structure, and a method for manufacturing an electronic package structure provided. The substrate structure includes a dielectric layer, a trace layer, and at least one wettable flank. The dielectric layer has a first surface and a second surface opposite to the first surface. The trace layer is embedded in the dielectric layer and exposed from the first surface of the dielectric layer. The at least one wettable flank is stacked with a portion of the trace layer embedded in the dielectric layer.
    Type: Application
    Filed: March 25, 2021
    Publication date: September 29, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Publication number: 20220301989
    Abstract: A substrate structure and a semiconductor package structure including the same are provided. The substrate structure includes a circuit layer and a dielectric structure. The circuit layer has a bottom surface and a top surface opposite to the bottom surface. The dielectric structure around the circuit layer. The dielectric structure covers a first part of the bottom surface of the circuit layer, and exposes a second part of the bottom surface and the top surface of the circuit layer. The dielectric structure exposes the top surface of the circuit layer. In addition, a method of manufacturing a semiconductor package structure is also provided.
    Type: Application
    Filed: March 17, 2021
    Publication date: September 22, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Kuang-Hsiung CHEN, Bernd Karl APPELT
  • Publication number: 20220302008
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate, a first module disposed on the substrate, a second module disposed on the substrate and spaced apart from the first module, and a conductive element disposed outside of the substrate and configured to provide a signal transmission path between the first module and the second module.
    Type: Application
    Filed: March 22, 2021
    Publication date: September 22, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Publication number: 20220302004
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface of the substrate. The substrate has a through opening extending between the first surface of the substrate and the second surface of the substrate. The semiconductor device package also includes a conductive pad in the through opening and approximal to the second surface of the substrate. The conductive pad has a first surface and a second surface opposite to the first surface of the conductive pad. The semiconductor device package also includes a conductive pillar in contact with the first surface of the conductive pad. The second surface of the conductive pad protrudes from the second surface of the substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 22, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Patent number: 11322428
    Abstract: A semiconductor device package includes a substrate, a first semiconductor die, a conductive via, a first contact pad and a second contact pad. The substrate includes a first surface, and a second surface opposite to the first surface, the substrate defines a cavity through the substrate. The first semiconductor die is disposed in the cavity, wherein the first semiconductor die includes an active surface adjacent to the first surface, and an inactive surface. The conductive via penetrates through the substrate. The first contact pad is exposed from the active surface of the first semiconductor die and adjacent to the first surface of the substrate. The second contact pad is disposed on the first surface of the substrate, wherein the second contact pad is connected to a first end of the conductive via.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 3, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Patent number: 11322454
    Abstract: A semiconductor device package includes an electronic component, an infrared blocking layer, an upper protection layer and a side protection layer. The infrared blocking layer includes a first portion disposed over the electronic component. The infrared blocking layer includes a second portion surrounding the electronic component. The first portion is integral with the second portion. The upper protection layer is disposed on the first portion of the infrared blocking layer. The side protection layer is disposed on the second portion of the infrared blocking layer. The upper protection layer and the side protection layer are formed of different materials.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: May 3, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Patent number: 11322468
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate and a metal holder. The substrate includes at least one bonding pad disposed adjacent to its surface and the metal holder is disposed adjacent to the bonding pad.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: May 3, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Publication number: 20220115288
    Abstract: A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
  • Publication number: 20220115328
    Abstract: An electronic package and manufacturing method thereof are provided. The electronic package includes a substrate, a first encapsulant, a wettable flank and a shielding layer. The substrate includes a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface. The first encapsulant is disposed on the first surface of the substrate. The wettable flank is exposed from the side surface of the substrate. The shielding layer covers a side surface of the first encapsulant, wherein on the side surface of the substrate, the shielding layer is spaced apart from the wettable flank.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stephan ESSIG
  • Publication number: 20220115310
    Abstract: An electronic package and method for manufacturing the same are provided. The electronic package includes a substrate and a wetting layer. The substrate includes a plurality of conductive step structures each including a first portion and a second portion. The first portion has a first bottom surface, a first outer surface and a first inner surface. The second portion has a second bottom surface, a second outer surface and a second inner surface, wherein the second portion partially exposes the first bottom surface. The wetting layer at least covers the second bottom surface, the second outer surface and the second inner surface of the second portion of each of the conductive step structures.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stephan ESSIG
  • Patent number: 11282777
    Abstract: A semiconductor package includes a core layer, a conductive interconnect and a semiconductor chip. The core layer has a top surface and a bottom surface opposite to the top surface. The conductive interconnect penetrates through the core layer. The conductive interconnect has a top surface and a bottom surface respectively exposed from the top surface and the bottom surface of the core layer. The semiconductor chip is disposed on the top surface of the core layer. The semiconductor chip includes a conductive pad, and the top surface of the conductive interconnect directly contacts the conductive pad.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: March 22, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Publication number: 20220037290
    Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.
    Type: Application
    Filed: October 12, 2021
    Publication date: February 3, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
  • Publication number: 20210335742
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate and a metal holder. The substrate includes at least one bonding pad disposed adjacent to its surface and the metal holder is disposed adjacent to the bonding pad.
    Type: Application
    Filed: April 28, 2020
    Publication date: October 28, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT
  • Publication number: 20210327841
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 21, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: You-Lung YEN, Bernd Karl APPELT