Patents by Inventor Betty Tang
Betty Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140091417Abstract: A method of depositing a low refractive index coating on a photo-active feature on a substrate comprises forming a substrate having one or more photo-active features thereon and placing the substrate in a process zone. A deposition gas is energized in a remote gas energizer, the deposition gas comprising a fluorocarbon gas and an additive gas. The remotely energized deposition gas is flowed into the process zone to deposit a low refractive index coating on the substrate.Type: ApplicationFiled: September 28, 2013Publication date: April 3, 2014Applicant: Applied Materials, Inc.Inventors: Sum-Yee Betty TANG, Martin SEAMONS, Kiran V. THADANI, Abhijit MALLICK
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Publication number: 20140091379Abstract: A fluorocarbon coating comprises an amorphous structure with CF2 bonds present in an atomic percentage of at least about 15%, and having a refractive index of less than about 1.4. The fluorocarbon coating can be deposited on a substrate by placing the substrate in a process zone comprising a pair of process electrodes, introducing a deposition gas comprising a fluorocarbon gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes.Type: ApplicationFiled: September 28, 2013Publication date: April 3, 2014Applicant: Applied Materials, Inc.Inventors: Sum-Yee Betty TANG, Martin SEAMONS
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Patent number: 8125034Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.Type: GrantFiled: June 9, 2010Date of Patent: February 28, 2012Assignee: Applied Materials, Inc.Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
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Publication number: 20110151142Abstract: Embodiments of the present invention provide methods for reducing defects during multi-layer deposition. In one embodiment, the method includes exposing the substrate to a first gas mixture and an inert gas in the presence of a plasma to deposit a first material layer on the substrate, terminating the first gas mixture when a desired thickness of the first material is achieved while still maintaining the plasma and flowing the inert gas, and exposing the substrate to the inert gas and a second gas mixture that are compatible with the first gas mixture in the presence of the plasma to deposit a second material layer over the first material layer in the same processing chamber, wherein the first material layer and the second material layer are different from each other.Type: ApplicationFiled: December 15, 2010Publication date: June 23, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Martin Jay Seamons, Sum-Yee Betty Tang, Michael H. Lin, Patrick Reilly, Sudha Rathi
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Publication number: 20100239979Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.Type: ApplicationFiled: June 9, 2010Publication date: September 23, 2010Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
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Patent number: 7776516Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.Type: GrantFiled: July 18, 2006Date of Patent: August 17, 2010Assignee: Applied Materials, Inc.Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
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Patent number: 7407893Abstract: Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein the processing gas comprises a carrier gas, hydrogen, and one or more precursor compounds, generating a plasma of the processing gas by applying power from a dual-frequency RF source, and depositing an amorphous carbon layer on the substrate.Type: GrantFiled: February 24, 2005Date of Patent: August 5, 2008Assignee: Applied Materials, Inc.Inventors: Martin Jay Seamons, Wendy H. Yeh, Sudha S. R. Rathi, Deenesh Padhi, Andy (Hsin Chiao) Luan, Sum-Yee Betty Tang, Priya Kulkarni, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Hichem M'Saad, Yuxiang May Wang, Michael Chiu Kwan
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Publication number: 20080020319Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.Type: ApplicationFiled: July 18, 2006Publication date: January 24, 2008Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
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Publication number: 20070207275Abstract: Methods for cleaning semiconductor processing chambers used to process carbon-containing films, such as amorphous carbon films, barrier films comprising silicon and carbon, and low dielectric constant films including silicon, oxygen, and carbon are provided. The methods include using a remote plasma source to generate reactive species that clean interior surfaces of a processing chamber in the absence of RF power in the chamber. The reactive species are generated from an oxygen-containing gas, such as O2, and/or a halogen-containing gas, such as NF3. An oxygen-based ashing process may also be used to remove carbon deposits from the interior surfaces of the chamber before the chamber is exposed to the reactive species from the remote plasma source.Type: ApplicationFiled: August 23, 2006Publication date: September 6, 2007Inventors: Thomas Nowak, Kang Sub Yim, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Vu Ngoc Tran Nguyen, Dennis Singleton, Martin Jay Seamons, Karthik Janakiraman, Ganesh Balasubramanian, Mohamed Ayoub, Wendy H. Yeh, Alexandros T. Demos, Hichem M'Saad
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Patent number: 7227244Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: August 24, 2004Date of Patent: June 5, 2007Assignee: Applied Materials, Inc.Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20050234528Abstract: A light-triggered tattoo process. A strong absorber of light energy and tattoo material are sandwiched under pressure between a skin region and a transparent window. Short pulses of light, at frequencies strongly absorbed by the strong absorber, illuminates the strong absorber through the window creating micro-explosions in the strong absorber that drive particles of the tattoo material into the skin region producing a tattoo.Type: ApplicationFiled: March 25, 2004Publication date: October 20, 2005Inventors: Kenneth Tang, Allen Hunter, Betty Tang
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Patent number: 6858153Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: November 5, 2001Date of Patent: February 22, 2005Assignee: Applied Materials Inc.Inventors: Claes H. Bjorkman, Min Melissa Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20050023694Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: ApplicationFiled: August 24, 2004Publication date: February 3, 2005Inventors: Claes Bjorkman, Melissa Yu, Hongqing Shan, David Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Chapra, Gerald Yin, Farhad Moghadam, Judy Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Patent number: 6762127Abstract: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).Type: GrantFiled: August 23, 2001Date of Patent: July 13, 2004Inventors: Yves Pierre Boiteux, Hui Chen, Ivano Gregoratto, Chang-Lin Hsieh, Hoiman Hung, Sum-Yee Betty Tang
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Patent number: 6669858Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: November 5, 2001Date of Patent: December 30, 2003Assignee: Applied Materials Inc.Inventors: Claes H. Bjorkman, Min Melissa Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20030073321Abstract: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).Type: ApplicationFiled: August 23, 2001Publication date: April 17, 2003Applicant: Applied Material, Inc.Inventors: Yves Pierre Boiteux, Hui Chen, Ivano Gregoratto, Chang-Lin Hsieh, Hoiman Hung, Sum-Yee Betty Tang
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Publication number: 20020142598Abstract: A process for etching a dielectric layer with an underlying stop layer, particularly in a counterbore process for a dual-damascene interconnect structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer. For the oxide/nitride compositions, the selective etch is based on a fluorocarbon and argon chemistry, preferably with a lean etchant combined with a richer polymer former, and the non-selective etch includes a fluorocarbon or hydrofluorocarbon, argon and an oxygen-containing gas, such as CO.Type: ApplicationFiled: March 20, 2002Publication date: October 3, 2002Inventors: Betty Tang, Jian Ding
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Publication number: 20020084257Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: ApplicationFiled: November 5, 2001Publication date: July 4, 2002Applicant: Applied Materials, Inc.Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongqing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20020074309Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: ApplicationFiled: November 5, 2001Publication date: June 20, 2002Applicant: Applied Materials, Inc.Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongqing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Patent number: 6399511Abstract: A dielectric etch process applicable etching a dielectric layer with an underlying stop layer. It is particularly though not necessarily applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer.Type: GrantFiled: December 1, 2000Date of Patent: June 4, 2002Assignee: Applied Materials, Inc.Inventors: Betty Tang, Jian Ding