Patents by Inventor Bhupendra Manola

Bhupendra Manola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11777517
    Abstract: An integrated circuit having multiple switched-capacitor delta-sigma data converter circuits includes compensation for voltage reference error due to leakage current that causes reference voltage droop. The reference filter capacitor terminal voltage is maintained by periodic connection to the reference feedback capacitor(s) that are alternately connected to a voltage reference buffer, and the leakage into the reference feedback capacitor networks of disabled converter circuits causes reference voltage droop. The compensation is either determined from the number of converter circuits that are disabled, or from an error between the filter capacitor voltage and a separate voltage reference, and may be applied by adjusting a resistance selectively coupled between the voltage reference buffer output and the filter capacitor, feedback applied to the voltage reference buffer or its input source.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: October 3, 2023
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Chandra Prakash, Bhupendra Manola, John L. Melanson
  • Publication number: 20220149864
    Abstract: An integrated circuit having multiple switched-capacitor delta-sigma data converter circuits includes compensation for voltage reference error due to leakage current that causes reference voltage droop. The reference filter capacitor terminal voltage is maintained by periodic connection to the reference feedback capacitor(s) that are alternately connected to a voltage reference buffer, and the leakage into the reference feedback capacitor networks of disabled converter circuits causes reference voltage droop. The compensation is either determined from the number of converter circuits that are disabled, or from an error between the filter capacitor voltage and a separate voltage reference, and may be applied by adjusting a resistance selectively coupled between the voltage reference buffer output and the filter capacitor, feedback applied to the voltage reference buffer or its input source.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Chandra Prakash, Bhupendra Manola, John L. Melanson
  • Patent number: 10432150
    Abstract: An apparatus may include a digital-to-analog converter configured to convert a digital audio input signal into a differential analog input signal with a substantially non-zero common-mode voltage, an amplifier configured to receive the differential analog input signal and generate at an amplifier output a ground-centered output signal from the differential analog input signal, a clamp configured to selectively couple and decouple the amplifier output to a ground voltage, and a controller configured to control the clamp to selectively couple and decouple the amplifier output to a ground voltage responsive to transitions between power states of a device comprising the apparatus and control the differential analog input signal generated by the digital-to-analog converter in order to minimize a level transition current through an output load coupled to the amplifier output during transitions between the power states.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: October 1, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramya Balasundaram, Bhupendra Manola, Pradeep Dhananjay
  • Publication number: 20180358934
    Abstract: An apparatus may include a digital-to-analog converter configured to convert a digital audio input signal into a differential analog input signal with a substantially non-zero common-mode voltage, an amplifier configured to receive the differential analog input signal and generate at an amplifier output a ground-centered output signal from the differential analog input signal, a clamp configured to selectively couple and decouple the amplifier output to a ground voltage, and a controller configured to control the clamp to selectively couple and decouple the amplifier output to a ground voltage responsive to transitions between power states of a device comprising the apparatus and control the differential analog input signal generated by the digital-to-analog converter in order to minimize a level transition current through an output load coupled to the amplifier output during transitions between the power states.
    Type: Application
    Filed: May 31, 2018
    Publication date: December 13, 2018
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramya BALASUNDARAM, Bhupendra MANOLA, Pradeep DHANANJAY
  • Publication number: 20180316525
    Abstract: An apparatus for generating an output signal, may comprise a signal path having an analog signal path portion having an analog magnitude droop, a digital signal path portion having a digital magnitude droop, a digital-to-analog converter for converting the digital input signal into the analog signal, a first digital compensation filter that compensates for the analog magnitude droop, and a second digital compensation filter that compensates for the digital magnitude droop, such that the first digital compensation filter and the second digital compensation filter together compensate for magnitude droop of the signal path to ensure a substantially flat passband response of the signal path.
    Type: Application
    Filed: March 20, 2018
    Publication date: November 1, 2018
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Pradeep DHANANJAY, Tejasvi DAS, Bhupendra MANOLA, Bruce E. DUEWER
  • Patent number: 10116473
    Abstract: An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: October 30, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Pradeep Dhananjay, Tejasvi Das, Bhupendra Manola, Bruce E. Duewer