Patents by Inventor Billy R. Poston

Billy R. Poston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4864563
    Abstract: A method for establishing and maintaining a nodal network in a communication system is described using a network connectivity matrix at each node of the network. The network connectivity matrix has a plurality of channels each corresponding to a node of the network and storing nodal information about the connectivity status of the node in the network. Each channel (row) of the network connectivity matrix at each node includes a first field for storing data indicating whether a usable line-of-sight (LOS) transmission path exists between the node and each other node of the network, a second field for storing data indicating when the row was last revised, a third field for storing the identification of the most recent transmission received by the node and a fourth field for storing data indicating a quality of the transmission path between the node and each node within LOS of the node.
    Type: Grant
    Filed: January 9, 1989
    Date of Patent: September 5, 1989
    Assignee: E-Systems, Inc.
    Inventors: Charles F. Pavey, Billy R. Poston, Arthur M. Richard
  • Patent number: 4518947
    Abstract: A method and apparatus is disclosed for decoding a redundantly coded digital signal wherein each information character is coded with a plurality of signal elements. Each of the signal elements is sampled by an analog to digital converter (110) and the resulting sample value is transmitted to an adder (114). The sampled value is added to an accumulated sum which is received from a storage circuit (128). The sum of the sampled value and the accumulated sum is transmitted through a selector switch (120) to both a decision circuit (126) and the storage circuit (128). After the last of the redundantly coded signal elements is sampled and the sampled values included within the accumulation sum, the state of the information character is determined by the decision circuit (126). Switch (120) then enters a null data set to reset the accumulated sum to zero for processing the next group of redundantly coded signal elements.
    Type: Grant
    Filed: March 8, 1984
    Date of Patent: May 21, 1985
    Assignee: E-Systems, Inc.
    Inventors: Billy R. Poston, Carl F. Andren
  • Patent number: 4490831
    Abstract: A digital pulse detector circuit having a selectable false alarm rate receives an analog input signal containing periodic correlation pulses in a background of noise. The input signal is sampled and digitized to produce a series of digital input samples which are taken for regular time slots within a series of time frames. Each of the digital input samples is summed with a previously stored digital summation sample to produce a new summation digital sample that replaces the summation sample read out of memory to produce the new summation sample. The new digital summation sample is compared to a threshold value to produce a signal confirmed signal to indicate detection of the correlation pulse. When a set number of summation steps are carried out for a particular time slot and the summation value for that time slot has not exceeded the threshold value, that time slot is reset to zero to eliminate accumulated noise.
    Type: Grant
    Filed: March 1, 1983
    Date of Patent: December 25, 1984
    Assignee: E Systems, Inc.
    Inventors: Billy R. Poston, Stuart L. Atkinson
  • Patent number: 4280218
    Abstract: Improved acquisition of signals in a Gaussian noise environment is achieved by applying the output of a correlator (14) to a threshold detector (12). A correlation pulse output from the threshold detector (12) and the output of the correlator (14) are input to a false alarm processor (10) that includes multiple correlation checking channels (22). Each correlation checking channel (22) is assigned to sample an input at various points over a selected interval by an enable pulse generated at the output of select logic (30). Each correlation checking channel (22) includes correlation check enable logic (34), a blanking generator (36), and a confirmation logic (42). In the confirmation logic (42) samples of the analog input are taken at discrete times and integrated over a preselected number of intervals.
    Type: Grant
    Filed: August 8, 1979
    Date of Patent: July 21, 1981
    Assignee: E-Systems, Inc.
    Inventors: Robert S. Gordy, Billy R. Poston, David E. Sanders