Patents by Inventor Bing K. Yen

Bing K. Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150270311
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Application
    Filed: June 3, 2015
    Publication date: September 24, 2015
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Zihui Wang, Xiaobin Wang, Bing K. Yen
  • Patent number: 9123575
    Abstract: The present invention is directed to a semiconductor memory device including a plurality of first level contacts arranged in an array with every third row vacant along a first direction, thereby forming multiple contact regions separated by multiple vacant regions along the first direction with each of the multiple contact regions including a first row and a second row of the first level contacts extending along a second direction; a first and second plurality of second level contacts formed on top of the first level contacts with the second plurality of second level contacts having elongated shape extending into the vacant regions adjacent thereto; and a first and second plurality of memory elements formed on top of the first and second plurality of second level contacts, respectively, thereby permitting the memory elements to have greater center-to-center distance between two closest neighbors than the first level contacts.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: September 1, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Kimihiro Satoh, Bing K Yen, Dong Ha Jung, Yiming Huai
  • Patent number: 9105343
    Abstract: The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of memory elements coupled in series. The method detects the resistance states of individual memory elements in an MLC by sequentially writing at least one of the plurality of memory element to the low resistance state in order of ascending write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: August 11, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Bing K Yen, Parviz Keshtbod, Mehdi Asnaashari
  • Patent number: 9082951
    Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: July 14, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Zihui Wang, Xiaobin Wang, Bing K. Yen, Xiaojie Hao
  • Patent number: 9070855
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: June 30, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Xiaobin Wang, Zihui Wang, Bing K Yen
  • Publication number: 20150171315
    Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic
    Type: Application
    Filed: December 4, 2014
    Publication date: June 18, 2015
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Zihui Wang, Xiaobin Wang, Bing K. Yen, Xiaojie Hao
  • Publication number: 20150131370
    Abstract: The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of memory elements coupled in series. The method detects the resistance states of individual memory elements in an MLC by sequentially writing at least one of the plurality of memory element to the low resistance state in order of ascending write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.
    Type: Application
    Filed: March 28, 2014
    Publication date: May 14, 2015
    Applicant: Avalanche Technology Inc.
    Inventors: Yuchen Zhou, Bing K. Yen, Parviz Keshtbod, Mehdi Asnaashari
  • Patent number: 9007719
    Abstract: System and methods are provided for the manufacture of a magnetic write head including a pole and yoke region, and a nose shape transition region connecting the yoke to the pole having very small minimum radius of curvature, providing for a sharp transition. A double mask technique is used providing for the adjustment of an offset and illumination conditions between the first and second mask, which provides the capability of tuning the shape of the transition region, and achieving features that would otherwise not be achievable due to distortions caused by optical proximity effect.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: April 14, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Hongping Yuan, Bing K. Yen, Ling Wang, Xianzhong Zeng, Dujiang Wan, Hai Sun
  • Patent number: 8900655
    Abstract: A method of fabricating a patterned perpendicular magnetic recording medium comprises steps of: (a) providing a layer stack including a magnetically soft underlayer (“SUL”) and an overlying non-magnetic interlayer; (b) forming a masking layer on the non-magnetic interlayer; (c) forming a resist layer on the masking layer; (d) forming a pattern of recesses extending through the resist layer and exposing spaced apart surface portions of the masking layer; (e) extending the pattern of recesses through the masking layer to expose spaced apart surface portions of the interlayer; and (f) at least partially filling the pattern of recesses with a magnetically hard material to form a perpendicular magnetic recording layer.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: December 2, 2014
    Assignee: Seagate Technology LLC
    Inventors: Bing K. Yen, David S. Kuo, Dieter K. Weller, Kim Y. Lee, Koichi Wago
  • Publication number: 20140193538
    Abstract: Provided herein is an apparatus, including an imprint template including a dual-imprint pattern, wherein the dual-imprint pattern is characteristic of imprinting a first pattern on the template with a first template and a second pattern on the template with a second template, and wherein the first pattern and the second pattern at least partially overlap to form the dual-imprint pattern.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 10, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Kim Y. Lee, Bing K. Yen, David S. Kuo, Koichi Wago, Shih-fu Lee, Dieter K. Weller
  • Patent number: 8724380
    Abstract: The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of MTJ memory elements coupled in series. The method detects the resistance states of individual MTJ memory elements in an MLC by sequentially writing each memory element to the low resistance state in order of ascending parallelizing write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: May 13, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Ebrahim Abedifard, Parviz Keshtbod, Mahmood Mozaffari, Kimihiro Satoh, Bing K Yen, Yiming Huai
  • Publication number: 20140042571
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Application
    Filed: October 14, 2013
    Publication date: February 13, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Xiaobin Wang, Zihui Wang, Bing K Yen
  • Patent number: 7846756
    Abstract: A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: December 7, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Bing K. Yen, Chun-Ming Wang, Yung-Tin Chen, Steven Maxwell
  • Patent number: 7830698
    Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element. The storage element includes a carbon material and the memory cell includes a rewritable cell having multiple memory levels.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: November 9, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Xiying Chen, Bing K. Yen, Dat Nguyen, Huiwen Xu, George Samachisa, Tanmay Kumar, Er-Xuan Ping
  • Patent number: 7758982
    Abstract: A SiON overcoat for use on magnetic media for magnetic recording. The SiON overcoat is deposited by pulsed DC sputtering while applying a negative DC bias. The SiON overcoat is especially useful on perpendicular magnetic recording media because of its ability to deposit thinly and evenly on a rough, granular high coercivity recording media while maintaining excellent corrosion protection properties. A SiON overcoat can be applied less than 3 nm thick while still maintaining excellent mechanical and corrosion protection. The overcoat also has a very high density and water contact angle.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: July 20, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Qing Dai, Hoa Van Do, Min Xiao, Bing K Yen
  • Publication number: 20100167502
    Abstract: A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Bing K. Yen, Chun-Ming Wang, Yung-Tin Chen, Steven Maxwell
  • Publication number: 20100062282
    Abstract: The invention relates to bit patterned recording media having a stop layer for chemical mechanical polishing. One embodiment of the present invention is a method of manufacturing a magnetic recording medium comprising the step of planarizing by chemical mechanical polishing until the stop layer is reached. The present invention also provides a magnetic recording medium having a stop layer.
    Type: Application
    Filed: September 10, 2008
    Publication date: March 11, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Bing K. Yen, Jim Hennessey, Eric Freeman, Kim Yang Lee, David S. Kuo, Mark Ostrowski
  • Publication number: 20100055346
    Abstract: The invention relates to a method of depositing a release layer on a Ni surface for use in nano-imprint lithography comprising passivating the Ni surface, etching the passivated Ni surface, and depositing a layer of fluorocarbon on the passivated and etched surface.
    Type: Application
    Filed: September 2, 2008
    Publication date: March 4, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Bing K. Yen, Jianwei Liu
  • Publication number: 20090257265
    Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element. The storage element includes a carbon material and the memory cell includes a rewritable cell having multiple memory levels.
    Type: Application
    Filed: May 27, 2008
    Publication date: October 15, 2009
    Inventors: Xiying Chen, Bing K. Yen, Dat Nguyen, Huiwen Xu, George Samachisa, Tanmay Kumar, Er-Xuan Ping
  • Publication number: 20080085362
    Abstract: A method of fabricating a patterned perpendicular magnetic recording medium comprises steps of: (a) providing a layer stack including a magnetically soft underlayer (“SUL”) and an overlying non-magnetic interlayer; (b) forming a masking layer on the non-magnetic interlayer; (c) forming a resist layer on the masking layer; (d) forming a pattern of recesses extending through the resist layer and exposing spaced apart surface portions of the masking layer; (e) extending the pattern of recesses through the masking layer to expose spaced apart surface portions of the interlayer; and (f) at least partially filling the pattern of recesses with a magnetically hard material to form a perpendicular magnetic recording layer.
    Type: Application
    Filed: October 4, 2006
    Publication date: April 10, 2008
    Inventors: Bing K. Yen, David S. Kuo, Dieter K. Weller, Kim Y. Lee, Koichi Wago