Abstract: This invention relates to MOS transistors and a method for fabricating the MOS transistors having LDD (Lightly Doped Drain) structures, which comprises a first conduction type semiconductor substrate, a second conduction type high density source and drain regions formed spaced from each other in the first conduction type semiconductor substrate, a second conduction type low density impurity region formed on sides facing each other of, and adjacent to the second conduction type high density source and drain regions, a first gate insulation film formed on both ends of a upper part of the semiconductor substrate region between the second conduction type low density impurity region, a second gate insulation film formed on upper part of the semiconductor substrate region between the first gate insulation films, a first conduction layer in a form of side wall spacer formed on the first gate insulation film, a second conduction layer formed on the second gate insulation film, a third conduction layer formed on the f

Abstract: An automatic machining scheduling method based on an expert system is provided, which can optimize and facilitate the assignment of processes in a large-scale production system to individual machine tools, based on expert experience accumulated as a database, thereby enabling effective operation of the production system. When requested quantities for respective machine models to be produced are input (S1), the machining time of each jig involved in a respective machine model and the usage form of each jig are read from the related files, and the former is multiplied by the latter, to obtain the total machining time for each of the machine tools (S2, S3). A day or week production matrix is created based on the ratio of the calculated time of each of the machine tools to the operating time thereof per day (S4-S7). It is determined whether a machining schedule including a pattern identical to the machining pattern of the matrix is registered (S10, S11).