Patents by Inventor Bong-Jin Kuh
Bong-Jin Kuh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230116342Abstract: A semiconductor device is provided. A semiconductor device includes: a first active pattern spaced apart from a substrate and extending in a first direction; a second active pattern spaced apart further from the substrate than the first active pattern and extending in the first direction; a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first active pattern and the second active pattern; a first source/drain region on at least one side surface of the gate structure and connected to the first active pattern; a second source/drain region on at least one side surface of the gate structure and connected to the second active pattern; and a buffer layer between the substrate and the first active pattern, the buffer layer containing germanium.Type: ApplicationFiled: June 1, 2022Publication date: April 13, 2023Inventors: Won Hee Choi, Sung Uk Jang, Dong Suk Shin, Bong Jin Kuh, Kong Soo Lee
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Patent number: 11183402Abstract: A laser annealing apparatus includes a laser oscillating structure, an oscillator, a beam expanding telescope, a first power meter, and a second power meter. The laser oscillating structure emits a first laser beam of a first wavelength and first beam cross-section to a substrate in a chamber including an optical window. The oscillator emits a second laser beam, of a second wavelength different from the first wavelength, to the substrate. The beam expanding telescope is on an optical path for the second laser beam and expands the second laser beam to a second beam cross-section. The first and second power meters measure energy of the second laser beam and a third laser beam, generated as the second laser beam is reflected by the substrate. The first beam cross-section and the second beam cross-section may be equal.Type: GrantFiled: October 27, 2017Date of Patent: November 23, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Joong-han Shin, Supakit Charnvanichborikarn, Bong-jin Kuh, Ki-chul Kim, Jae-hee Lee
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Publication number: 20180308725Abstract: A laser annealing apparatus includes a laser oscillating structure, an oscillator, a beam expanding telescope, a first power meter, and a second power meter. The laser oscillating structure emits a first laser beam of a first wavelength and first beam cross-section to a substrate in a chamber including an optical window. The oscillator emits a second laser beam, of a second wavelength different from the first wavelength, to the substrate. The beam expanding telescope is on an optical path for the second laser beam and expands the second laser beam to a second beam cross-section. The first and second power meters measure energy of the second laser beam and a third laser beam, generated as the second laser beam is reflected by the substrate. The first beam cross-section and the second beam cross-section may be equal.Type: ApplicationFiled: October 27, 2017Publication date: October 25, 2018Inventors: Joong-han SHIN, Supakit CHARNVANICHBORIKARN, Bong-jin KUH, Ki-chul KIM, Jae-hee LEE
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Patent number: 9842966Abstract: There is provided a nanostructure semiconductor light emitting device including a base layer formed of a first conductivity-type semiconductor, a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer, a plurality of nanocores disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor, an active layer disposed on surfaces of the plurality of nanocores positioned to be higher than the first insulating layer, a second insulating layer disposed on the first insulating layer and having a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores, and a second conductivity-type semiconductor layer disposed on the surface of the active layer positioned to be higher than the second insulating layer.Type: GrantFiled: January 28, 2014Date of Patent: December 12, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Nam-Goo Cha, Bong-Jin Kuh, Han-Mei Choi
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Patent number: 9608163Abstract: A nano-structure semiconductor light emitting device includes a base layer formed of a first conductivity type semiconductor, and a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer. A plurality of nanocores is disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor. An active layer is disposed on surfaces of the plurality of nanocores and positioned above the first insulating layer. A second insulating layer is disposed on the first insulating layer and has a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores. A second conductivity-type semiconductor layer is disposed on the surface of the active layer positioned to be above the second insulating layer.Type: GrantFiled: January 27, 2014Date of Patent: March 28, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Nam Goo Cha, Bong Jin Kuh, Han Mei Choi
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Patent number: 9589795Abstract: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution.Type: GrantFiled: January 12, 2016Date of Patent: March 7, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-Ho Kang, Bong-Jin Kuh, Yong-Kyu Joo, Sung-Ho Heo, Hee-Seok Kim, Yong-Sung Park
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Patent number: 9576969Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.Type: GrantFiled: June 17, 2016Date of Patent: February 21, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Wanit Manorotkul, Joong-han Shin, Bong-jin Kuh, Han-mei Choi, Dmitry Mikulik
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Patent number: 9553141Abstract: A semiconductor device includes a plurality of lower electrodes having a vertical length greater than a horizontal width on a substrate, a supporter disposed between the lower electrodes, an upper electrode disposed on the lower electrodes, and a capacitor dielectric layer disposed between the lower electrodes and the upper electrode. The supporter includes a first element, a second element, and oxygen, an oxide of the second element has a higher band gap energy than an oxide of the first element, and the content of the second element in the supporter is from about 10 at % to 90 at %.Type: GrantFiled: September 18, 2015Date of Patent: January 24, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyun-Jeong Yang, Soon-Wook Jung, Bong-Jin Kuh, Wan-Don Kim, Byung-Hong Chung, Yong-Suk Tak
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Publication number: 20160300847Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.Type: ApplicationFiled: June 17, 2016Publication date: October 13, 2016Inventors: Wanit MANOROTKUL, Joong-han SHIN, Bong-jin KUH, Han-mei CHOI, Dmitry MIKULIK
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Patent number: 9391090Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.Type: GrantFiled: July 21, 2015Date of Patent: July 12, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Wanit Manorotkul, Joong-han Shin, Bong-jin Kuh, Han-mei Choi, Dmitry Mikulik
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Publication number: 20160126096Abstract: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution.Type: ApplicationFiled: January 12, 2016Publication date: May 5, 2016Applicant: Kookje Electric Korea Co., Ltd.Inventors: Sung-Ho KANG, Bong-Jin KUH, Yong-Kyu JOO, Sung-Ho HEO, Hee-Seok KIM, Yong-Sung PARK
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Patent number: 9316789Abstract: A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>.Type: GrantFiled: July 10, 2015Date of Patent: April 19, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ki Chul Kim, Bong Jin Kuh, Jung Yun Won, Eun Ha Lee, Han Mei Choi
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Publication number: 20160056171Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.Type: ApplicationFiled: July 21, 2015Publication date: February 25, 2016Inventors: Wanit MANOROTKUL, Joong-han SHIN, Bong-jin KUH, Han-mei CHOI, Dmitry MIKULIK
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Patent number: 9269578Abstract: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution.Type: GrantFiled: January 10, 2014Date of Patent: February 23, 2016Assignees: SAMSUNG ELECTRONICS CO., LTD., KOOKJE ELECTRIC KOREA CO., LTD.Inventors: Sung-Ho Kang, Bong-Jin Kuh, Yong-Kyu Joo, Sung-Ho Heo, Hee-Seok Kim, Yong-Sung Park
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Publication number: 20160005806Abstract: A semiconductor device includes a plurality of lower electrodes having a vertical length greater than a horizontal width on a substrate, a supporter disposed between the lower electrodes, an upper electrode disposed on the lower electrodes, and a capacitor dielectric layer disposed between the lower electrodes and the upper electrode. The supporter includes a first element, a second element, and oxygen, an oxide of the second element has a higher band gap energy than an oxide of the first element, and the content of the second element in the supporter is from about 10 at % to 90 at %.Type: ApplicationFiled: September 18, 2015Publication date: January 7, 2016Inventors: Hyun-Jeong YANG, Soon-Wook JUNG, Bong-Jin KUH, Wan-Don KIM, Byung-Hong CHUNG, Yong-Suk TAK
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Publication number: 20150372194Abstract: There is provided a nanostructure semiconductor light emitting device including a base layer formed of a first conductivity-type semiconductor, a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer, a plurality of nanocores disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor, an active layer disposed on surfaces of the plurality of nanocores positioned to be higher than the first insulating layer, a second insulating layer disposed on the first insulating layer and having a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores, and a second conductivity-type semiconductor layer disposed on the surface of the active layer positioned to be higher than the second insulating layer.Type: ApplicationFiled: January 28, 2014Publication date: December 24, 2015Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Nam-Goo CHA, Bong-Jin KUH, Han-Mei CHOI
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Publication number: 20150309255Abstract: A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>.Type: ApplicationFiled: July 10, 2015Publication date: October 29, 2015Inventors: KI CHUL KIM, BONG JIN KUH, JUNG YUN WON, EUN HA LEE, HAN MEI CHOI
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Patent number: 9142558Abstract: A semiconductor device includes a plurality of lower electrodes having a vertical length greater than a horizontal width on a substrate, a supporter disposed between the lower electrodes, an upper electrode disposed on the lower electrodes, and a capacitor dielectric layer disposed between the lower electrodes and the upper electrode. The supporter includes a first element, a second element, and oxygen, an oxide of the second element has a higher band gap energy than an oxide of the first element, and the content of the second element in the supporter is from about 10 at % to 90 at %.Type: GrantFiled: October 29, 2013Date of Patent: September 22, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyun-Jeong Yang, Soon-Wook Jung, Bong-Jin Kuh, Wan-Don Kim, Byung-Hong Chung, Yong-Suk Tak
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Patent number: 9110233Abstract: A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>.Type: GrantFiled: December 24, 2012Date of Patent: August 18, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ki-Chul Kim, Bong-Jin Kuh, Jung-Yun Won, Eun-Ha Lee, Han-Mei Choi
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Patent number: 8993420Abstract: A method of forming an epitaxial layer includes forming a plurality of first insulation patterns in a substrate, the plurality of first insulation patterns spaced apart from each other, forming first epitaxial patterns on the plurality of first insulation patterns, forming second insulation patterns between the plurality of first insulation patterns to contact the plurality of first insulation patterns, and forming second epitaxial patterns on the second insulation patterns and between the first epitaxial patterns to contact the first epitaxial patterns, the first epitaxial patterns and the second epitaxial patterns forming a single epitaxial layer.Type: GrantFiled: December 19, 2013Date of Patent: March 31, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Joong-han Shin, Bong-jin Kuh, Ki-chul Kim, Jeong-meung Kim, Eun-ha Lee, Jong-sung Lim, Han-mei Choi