Abstract: The present disclosure provides a method of manufacturing a semiconductor device includes forming a first gate insulating film on a substrate for a first device, forming a first gate electrode on the first gate insulating film; forming a mask pattern on the first gate electrode to expose opposing end portions of the first gate electrode, wherein a length of the mask pattern is smaller than a length of the first gate electrode; performing ion implantation through the exposed opposing end portions of the first gate electrode using the mask pattern to simultaneously form first and second drift regions in the substrate; forming spacers on sidewalls of the first gate electrode, respectively; and forming a first source region and a first drain region in the first and second drift regions, respectively.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device includes forming a first gate insulating film on a substrate for a first device, forming a first gate electrode on the first gate insulating film; forming a mask pattern on the first gate electrode to expose opposing end portions of the first gate electrode, wherein a length of the mask pattern is smaller than a length of the first gate electrode; performing ion implantation through the exposed opposing end portions of the first gate electrode using the mask pattern to simultaneously form first and second drift regions in the substrate; forming spacers on sidewalls of the first gate electrode, respectively; and forming a first source region and a first drain region in the first and second drift regions, respectively.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device includes forming a first gate insulating film on a substrate for a first device, forming a first gate electrode on the first gate insulating film; forming a mask pattern on the first gate electrode to expose opposing end portions of the first gate electrode, wherein a length of the mask pattern is smaller than a length of the first gate electrode; performing ion implantation through the exposed opposing end portions of the first gate electrode using the mask pattern to simultaneously form first and second drift regions in the substrate; forming spacers on sidewalls of the first gate electrode, respectively; and forming a first source region and a first drain region in the first and second drift regions, respectively.

Abstract: A display driver semiconductor device includes a high voltage well region formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer formed using a deposition process. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer formed using a thermal process. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer.

Abstract: The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve Rsp by minimizing drift region resistance by satisfying breakdown voltage by improving the structure of a drift region through which current flows in a semiconductor device to provide optimal results. Moreover, a high frequency application achieves useful results by reducing a gate charge Qg for an identical device pitch to that of an alternative technology.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.

Abstract: A display driver semiconductor device includes a high voltage well region formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer formed using a deposition process. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer formed using a thermal process. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer.

Abstract: The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve Rsp by minimizing drift region resistance by satisfying breakdown voltage by improving the structure of a drift region through which current flows in a semiconductor device to provide optimal results. Moreover, a high frequency application achieves useful results by reducing a gate charge Qg for an identical device pitch to that of an alternative technology.

Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.

Abstract: The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve Rsp by minimizing drift region resistance by satisfying breakdown voltage by improving the structure of a drift region through which current flows in a semiconductor device to provide optimal results. Moreover, a high frequency application achieves useful results by reducing a gate charge Qg for an identical device pitch to that of an alternative technology.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a well region, a drain region and a source region disposed in the well region, a gate electrode disposed above the well region, a thin gate insulating layer and a thick gate insulating layer disposed under the gate electrode, the thick gate insulating layer being disclosed closer to the drain region than the thin gate insulating layer, and an extended drain junction region disposed below the gate electrode.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.

Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.

Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.

Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.

Abstract: A high voltage device includes drift regions formed in a substrate, an isolation layer formed in the substrate to isolate neighboring drift regions, wherein the isolation layer has a depth greater than that of the drift region, a gate electrode formed over the substrate, and source and drain regions formed in the drift regions on both sides of the gate electrode.

Abstract: The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve Rsp by minimizing drift region resistance by satisfying breakdown voltage by improving the structure of a drift region through which current flows in a semiconductor device to provide optimal results. Moreover, a high frequency application achieves useful results by reducing a gate charge Qg for an identical device pitch to that of an alternative technology.

Abstract: The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve Rsp by minimizing drift region resistance by satisfying breakdown voltage by improving the structure of a drift region through which current flows in a semiconductor device to provide optimal results. Moreover, a high frequency application achieves useful results by reducing a gate charge Qg for an identical device pitch to that of an alternative technology.